Stmicroelectronics S.a.

St-Ericsson Sa

Stmicroelectronics International N.v.

Luc Garcia

Fabrice Belveze

Benoit Butaye

Marc Joisson

Antonino Mondello

Daniele Mangano

Michel Cuenca

Michele Alessandro Carrano

Thierry Lapergue

Mathilde Sie

Jerome Lajoinie

Frederic Duez

Marc Gens

Fabien Laplace

A resettable digital stage operates when a supply voltage is higher than a threshold. A non-volatile memory stores a digital code read by a reading stage. A main power-on reset circuit generates a main reset signal controlling reset of the reading stage. A resettable volatile memory coupled to the reading stage stores a default value when reset. An auxiliary power-on reset circuit generates an auxiliary reset signal controlling reset of the volatile memory. Upon deactivation of the reset, the reading stage loads the digital code into the volatile memory. The main power-on reset circuit functions in a non-trimmed configuration response to the stored default value and in a trimmed configuration responsive to the stored digital code. The main power-on reset circuit has first and second operative thresholds which respectively fall within a first and second non-trimmed voltage range or within a first and second trimmed voltage range.

Integrated electronic system with an improved power-on reset circuit and method for controlling the integrated electronic system

A frequency conversion device for transforming a frequency of an input signal, the device comprising: a signal generator for providing a plurality N of first signals at a first frequency, where N&#x2267;1, from an input signal having an in-phase component I and a quadrature signal component Q; an oscillator for generating N parallel oscillation signals, wherein the N oscillation signals are stepped in phase with respect to one another; a mixer comprising N mixing components, each mixing component being coupled to receive a respective one of the plurality of first signals and coupled to receive a respective oscillation signal for mixing the respective first signal with the corresponding oscillation signal to provide an output signal; and a common amplifier for receiving the N output signals from the N mixing components in N sequential phases for transmission.

Frequency conversion device for wireless systems

A filter intended to receive a discrete time signal at a sampling clock frequency, comprising a determined number, greater than 2, of filtering units, each filtering unit comprising head capacitors in a number equal to the determined number, assembled in parallel between an input terminal and the terminal of an integration capacitor, and means for connecting, in successive clock cycles in a number equal to the determined number, successively each head capacitor to the input terminal, and for then simultaneously connecting the head capacitors to the integration capacitor, and in which the successive clock cycles during which the head capacitors of a filtering unit are connected to the input terminal are offset by one clock cycle from one filtering unit to the next one.

Analog filter with passive components for discrete time signals

A filter intended to receive a discrete time signal at a sampling clock frequency, comprising a determined number, greater than 2, of filtering units, each filtering unit comprising head capacitors in a number equal to the determined number, assembled in parallel between an input terminal and the terminal of an integration capacitor; and means for connecting, in successive clock cycles in a number equal to the determined number, successively each head capacitor to the input terminal, and for then simultaneously connecting the head capacitors to the integration capacitor, and in which the successive clock cycles during which the head capacitors of a filtering unit are connected to the input terminal are offset by one clock cycle from one filtering unit to the next one.

The present invention includes a mixer circuit integrating a voltage-to-currrent conversion in the same stage. A mixer deviceof a transmission system comprises a pair of transistorsandforming a differential circuit having two differential inputs receiving a carrier V, two differential current outputs delivering a differential output current and a common current output whose current is equal to the sum of the differential output currents; a current-to-voltage conversion elementcoupled to the common current output of the pair of transistors; an amplifierhaving a positive input receiving the modulating signal, a negative feedback input coupled to the current-to-voltage conversion element, and an output coupled to each of the differential inputs of the pair of transistors.

Digital modulation signal mixer

A receiver of a frequency-modulated signal representing a digital signal includes a down conversion unit or frequency translation unit to lower the frequency of the frequency-modulated signal and a digital demodulator to regenerate the digital signal from the lowered-frequency signal. The receiver furthermore includes a counter circuit to determine the number of periods of a reference signal from the frequency translation unit during a period of the lowered-frequency signal. The digital demodulator includes a computer unit to compute the period of the lowered-frequency signal from the number of periods of the reference signal.

Receiver of frequency-modulated signals with digital demodulator

A receiver of a frequency-modulated signal is provided. The receiver includes a frequency-transposition unit for lowering the frequency of the frequency-modulated signal, and a digital demodulator for regenerating a digital signal from the frequency-transposed signal. The frequency-transposition unit includes a local oscillator for generating a local oscillator signal used in lowering the frequency of the frequency-modulated signal. The frequency-transposed signal is sampled in the digital demodulator at the rate of a sampling signal, and the sampling signal is generated by the local oscillator of the frequency-transposition unit. In a preferred embodiment, the local oscillator includes at least one frequency-divider circuit that delivers the sampling signal. Also provided is a method for regenerating a digital signal from a frequency-modulated signal.

Frequency-modulated signal receiver with digital demodulator

A sinusoidal signal multiplier circuit produces an output sinusoidal signal substantially without any DC component. This sinusoidal signal multiplier circuit includes a first multiplication cell receiving a first sinusoidal signal at a first input and a second sinusoidal signal at a second input. The first multiplication cell delivers a first output signal. The sinusoidal signal multiplier circuit also includes a second multiplication cell, identical to the first multiplication cell, that receives the second sinusoidal signal at its first input and the first sinusoidal signal at its second input, and delivers a second output signal. The sinusoidal signal multiplier circuit also includes an adder circuit to add the first output signal and the second output signal to provide from the sinusoidal signal multiplier circuit an output signal substantially without any DC component.

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Saint Paul de Varces, France

Luc Garcia