International Business Machines Corporation

Louis Peter Vergari

Max Abbott Bouknecht

Donall G Bourke

Michael Ian Davis

In a data processing system which includes a base central processing unit, channel, and input/output (I/O) interface to which peripheral devices may be attached, a special attachment is disclosed. The attachment made to the base I/O interface includes connector circuitry which is required when the signals on the input/output interface must be repowered to peripheral devices in an expansion input/output unit, power isolation must be provided between a base data processing system and I/O expansion unit, or a remote peripheral device is to be attached to the base data processing system I/O interface. The connector circuit includes logic which responds to the normal I/O interface signals to energize drivers in the connector circuit to achieve repowering of signals on bidirectional signal lines and unidirectional signal lines.

Input/output interface connector circuit for repowering and isolation

A data processing system with improved input/output (I/O) techniques is disclosed. The input/output control logic, or channel, of a central processing unit is connected to a plurality of peripheral input/output device control units, in parallel, by a plural line interface bus which includes bidirectional data transfer lines and bidirectional address transfer wires. The interface bus also includes unidirectional lines to and from peripheral device control units which synchronize operation of use of the bus. Several forms of I/O communications are shown to be controlled by the interface bus and include, direct processor controlled data transfer with simultaneous transmission of data and commands to peripheral devices, cycle steal data transfers permitting concurrent input/output operations and central processor program instruction execution, and peripheral device initiated interrupt requests to the central processor. A common polling mechanism for selecting one of a plurality of peripheral devices which may be requesting cycle steal use of the bus or interrupt handling use of the bus is disclosed. During cycle steal data transfers, peripheral device status information can be transferred over the interface bus to the central processor storage without the need for requesting interrupt handling from the central processor.

Residual status reporting during chained cycle steal input/output

Common logic in a peripheral device control unit responds to a serially propagated poll signal from I/O control logic, or channel, along with a coded signal identifying either a poll for a cycle steal request or a poll for an interrupt request having one of several priorities. The poll signal received will be captured or propagated to following control units dependent upon whether the control unit has requested a cycle steal transfer, or has requested an interrupt at the priority level indicated by the coded signal accompanying the poll signal. Proper functioning of poll capture or propagation is possible even though one of the control units is physically removed from the serial chain of control units.

Common polling logic for input/output interrupt or cycle steal data

The interface between I/O control logic, or channel, and peripheral devices permits simultaneous transfer of command, device address, and data, and includes logic in a peripheral device control unit for dynamic change of the attached peripheral device interrupt priority level while the device may be executing a prior command. The I/O control logic includes means for initiating serial poll signalling while other transfers are taking place on the interface.

Growing community of inventors

Palm Springs, FL, United States of America

Louis Peter Vergari