Broadcom Corporation

Vlsi Technology, Inc.

Toshiba America Information Systems, Inc.

Zeevo, Inc.

Louis Pandula

John S Walley

Domitille Esnard

Subhas Bothra

Stephen Allott

Edwin X Li

Doug Baumann

An electronic device includes a rechargeable battery, an electrical circuit, a battery safety circuit, and a power down mode circuit. The electrical circuit is configured to generate a power mode control signal. The power down mode circuit receives the power mode control signal. If the power mode control signal has a first value, the power down mode circuit is configured to force a voltage at a first port of the battery safety circuit to a voltage value that is less than an under voltage lock out (UVLO) threshold value of the battery safety circuit to transition the electronic device from a normal operating mode to a low current power down mode. The electronic device may further include a wake up mode circuit.

Reducing current leakage and improving shelf life time of battery-based-devices

A system and method allow for safe use of headphones that include a microphone when using the headphones with a cellular phone, a music device, or the like. A desired audio signal, e.g., a voice of a caller or music, is discontinued when a microphone associated with the headphones picks up either a change in ambient noise or a particular type of ambient noise, e.g., an ambulance, a police car, a fire truck, someone yelling, brakes squealing, or the like. During this state, the headphones output either an audible alert signal, the ambient noise, or a pre-stored signal that states 'fire,' 'police,', &#x201c;yelling,&#x201d; etc. In this way, a person can safely talk on the phone or listen to music when walking or driving, while still being cognizant of what is going on around them.

System and method allowing for safe use of a headset

A method and apparatus for determining a delay vector from inputs of in-phase and quadrature phase low pass filters to an output of the demodulator of a dual mixer radio receiver and from such delay measurement computing and providing DC offset correction to said receiver.

DC offset correction for use in a radio architecture

Embodiments of the present invention provide flip-chip bond pad arrangements that lead to a smaller increase in die size than conventional approaches. This is accomplished by using the core side of a periphery I/O pad ring for placing some of the bond pads in order to meet the bond pad pitch requirements of flip chip technology. For example, alternating bond pads are moved inward to the core side of the I/O pads or drivers, to meet the bond pad pitch requirement between the bond pads that are moved to the core side as well the bond pads that remain outside of the core. Because the bond pads are moved inward instead of outward, the increase in the die size from the edge of the I/O pad ring is reduced. In an alternative embodiment, the bond pads are each bonded on top of an active circuitry of a corresponding I/O pad. In another alternative embodiment, the bond pads are disposed between I/O pads which are spaced from each other by a spacing in the direction of the periphery of the core to accommodate the bond pads.

Area efficient bond pad placement

The technique of redundantly retransmitting digitized voice data on multiple sequential frequencies increases the channel bit rate above the minimum required for normal communication in a frequency-hopping communication system for digitized voice signals. Digitized voice data is redundantly retransmitted on multiple sequential frequencies and the channel bit rate is increased above the minimum required for normal communication. Repeated transmissions of the same block of digitized voice data occurs n times at n times the bit rate of the original digitized voice data. A frequency-hopping transmitter transmits on different channels, or carrier frequencies, which are modulated by the digitized voice data signals from a transmitter data buffer. A receiver data buffer holds n blocks of digitized voice data. A signal quality estimator estimates which of the n blocks of digitized voice data has a desirable signal quality and selects the block of digitized voice data having the desirable signal quality at an output terminal of the system.

Bit error performance of a frequency hopping, radio communication system

An improved digital phase detector is used in a digital phase lock loop having a digitally controlled oscillator which includes a state controller and a counter. One embodiment of the phase detector includes a digital integrator; a first register and a first absolute value function; a second register and a second absolute value function; and a subtractor. In another embodiment the integrator includes a tapped delay line and a parallel summing network. The summing network includes a flow counter. The invention to provide a mechanism for ensuring the symmetry of the integration intervals of an early/late gate phase detector in the presence of phase error and to achieve relaxed timing for the phase error calculation without shortening the integration intervals to less than half a bit time while providing a valid phase error output once for each bit period.

Digital phase detector

A system and method for obtaining and maintaining synchronization with an incoming signal prior to and during the transmission of data. Specifically, embodiments of the present invention contemplate that synchronization is obtained by searching for an initial portion of a pattern in an input signal. Once the pattern is detected, the pattern (and/or some mathematical derivation thereof) must subsequently be detected a pre-determined number of times. Once synchronization has been obtained, a pattern is continually looked for in the input signal in order to maintain synchronization. The present invention maintains this synchronization even though data may be embedded within this input signal.

Growing community of inventors

Sunnyvale, CA, United States of America

Louis Pandula