Lsi Logic Corporation

Lsi Corporation

Louis Odenwald

William Ortega

Jason A Unrein

Steve R Schremmer

Embodiments of the invention provide a method associated with a RAID configuration, wherein RAID storage volumes are created by RAID controllers from a shared pool of disk drives. A specified RAID volume is mapped to a virtual target port, and is accessed by each of one or more servers via the virtual target address. One embodiment of the invention is directed to a method associated with multiple RAID controllers, and a pool of disk drives that comprises multiple storage disks. The method comprises operating one or more of the RAID controllers to each configure one or more RAID volumes from selected storage disks. A unique identifier is assigned to each of the RAID volumes, wherein a specified RAID volume is assigned a specified unique identifier, and a particular RAID controller is provided with ownership of the specified RAID volume at a particular time. The method further comprises using the specified unique identifier in an address to route an I/O message at the particular time between a selected host and the specified RAID volume, wherein the unique identifier includes no information that identifies the particular RAID controller.

Virtual port mapped RAID volumes

The present invention is directed to a system and method of providing an embedded input/output interface failover. An apparatus for providing an input/output interface with failover functionality between a host and a target may include a first data transfer route suitable for communicatively coupling the apparatus to a host system, a second data transfer route suitable for communicatively coupling the apparatus to a target, and a third data transfer route suitable for communicatively coupling the apparatus to the target. A memory suitable for storing electronic data is also included, the memory including a program of instructions. A controller is communicatively coupled to the first data transfer route, the second data transfer route, the third data transfer route and the memory. The controller is suitable for performing the program of instructions, wherein the program of instructions configures the controller to transfer data between the host and target utilizing the third data transfer route should the second data transfer route become unavailable.

Embedded input/output interface failover

The present invention is directed to a system and method of providing an integrated dynamic multipathing filter. A method of providing a data transfer between a host and a target in a network environment may include providing a logical identifier table by an input/output interface. The logical identifier table includes at least one logical identifier suitable for referencing a physical address identifier of a target. Communications between the host and the target are managed by selecting a route by the input/output interface from at least two routes associated with a logical identifier, the at least two routes communicatively coupling the input/output interface to the target so that the host may access the target utilizing the logical identifier.

Integrated dynamic multipathing filter

The present invention is directed to a system and method of providing an embedded input/output interface dynamic load balancing. A method for providing a load balancing function between a host and a target in a network environment by an input/output interface may include providing a logical identifier table by an input/output interface, the logical identifier table including at least one logical identifier, the logical identifier suitable for referencing at least one physical address identifier of a target. Communications are managed between the host and the target by the input/output interface. The communications occurring over at least one of a first route and a second route of at least two routes communicatively coupling the input/output interface to the target are managed so that the host transfers data by balancing data transferred utilizing the second route and the third route of the at least two routes.

Integrated dynamic load balancing by an input/output interface

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to (i) generate a sorted list of permanent unique identifiers according to predetermined criteria and (ii) associate a logical identification with a physical address identifier using the sorted list. The second circuit may be configured to manage communications between a host and a target. The second circuit may (i) communicate with the host using the logical identification and (ii) communicate with the target using the physical address identifier. The communications between the host and the target may be unaffected by changes in the physical address identifier. The function of the first circuit and/or the second circuit may be implemented, among other examples, in software and/or firmware.

Methodology for providing persistent target identification in a fibre channel environment

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to obtain a number of service parameters from a network device. The second circuit may be configured to store (i) a first portion of the service parameters in a first group comprising identification parameters, a number of pointers, and a control field and (ii) one or more second portions of the service parameters in one or more second groups, each comprising a communication parameter and a counter. Each of the number of pointers points to a null address or one of the one or more second groups.

Fibre Channel service parameter cache

The method and apparatus provides a data processing system. The data processing system includes a primary bus, a secondary bus, and a host processor connected to the primary bus. The data processing system includes a first secondary processor connected to the primacy bus and the secondary bus. Additionally, a second secondary processor is connected to the secondary bus. The first secondary processor and the second secondary processor forms cascaded processors for input/output functions. Selected functions normally performed by the second secondary processor are performed by the first secondary processor, wherein a division of workload increases performance of the data processing system. This architecture allows shifting of workload down to the secondary bus.

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Wichita, KS, United States of America

Louis Odenwald