Lucent Technologies Inc.

Agere Systems Inc.

Louis Nelson Ahlquist

Yinon Degani

King Lien Tai

Joseph Shmulovich

Dean Paul Kossives

Mark Anthony Cappuzzo

Louis T Gomez

Judith Martin Szalkowski

Jericho J Jacala

The specification describes an IC test apparatus having a test bed with sockets adapted to engage arrays of I/O solder balls/bumps on the IC chip. In one embodiment the sockets are provided with through holes to interconnect the solder bumps to the next board level with minimum electrical path length thereby reducing parasitic capacitive coupling. In another embodiment the sockets in the test bed are formed by intersecting V-grooves. If pairs of intersecting V-grooves are used, pyramid shaped features are produced at the bottom of each socket. Both the sharp edges formed by the intersecting V-grooves and the pyramid provide contact enhancement between the solder bumps and the test bed. The test bed can be made as a universal blank for a given solder bump pitch. The desired test circuit is formed at the next board level.

Methods and apparatus for testing integrated circuits

The specification describes wafer fabrication cleaning processes for silicon optical bench technology. The cleaning processes are designed to remove debris in situ after dicing silicon wafers mounted on a tape carrier. They were also developed specifically to avoid staining and residues that often result from using standard dicing approaches in silicon optical bench integrated circuit manufacture.

Process for the manufacture of optical integrated circuits

The specification describes a process for applying under bump metallization (UBM) for solder bump interconnections on interconnection substrates. The process uses a lift-off technique for defining the UBM and the lift-off technique has improved edge definition as the result of radiation hardening of the photoresist after lithographic patterning.

Manufacture of flip-chip device

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Annandale, NJ, United States of America

Louis Nelson Ahlquist