Hewlett-packard Development Company, L.p.

Lorraine Byrne

Kevin Dooley

David Fitzpatrick

Graeme Scott

Richard Coull

Liam Cheevers

Roger McQuaid

Eugene Cahill

Phil Keenan

Pat J Reilly

Paul Colfer

Niall Stobie

Roger Mcquaid

A structure for a chemical sensing device includes a plurality of recesses and a plurality of electrically conductive elements located in, and protruding from, the plurality of recesses.

Structure and method of manufacture

A dielectric layer includes a reflow via. The reflow via is formed by reflow of the dielectric layer away from a raised feature. An interconnect is in contact with the raised feature through the reflow via.

Interconnects through dielectric vias

Controlling dimensions of nanowires includes lithographically forming a trench in a layer of a polymer resin with a width less than one micrometer where the polymer resin has a thickness less than one micrometer and is deposited over an electrically conductive substrate, depositing a nanowire material within the trench to form a nanowire, and obtaining the nanowire from the trench with a removal mechanism.

Controlling dimensions of nanowires

A dielectric layer includes a reflow via. The reflow via is formed by reflow of the dielectric layer. An interconnect is in contact through the reflow via.

Interconnects through dielecric vias

A structure for a chemical sensing device, the structure comprising at least one electrically conductive element located in, and protruding from, at least one recess. A method of manufacturing the structure includes: (a) providing a template comprising at least one recess having a recess depth; (b) providing an electrically conductive material in the at least one recess; and (c) removing part of the template to decrease the recess depth of the at least one recess, thereby forming said protruding at least one electrically conductive element.

A method of making templated circuitry employs a template system that includes a template of an insulator material on a carrier having a conductive surface. The template includes multiple levels and multiple regions, wherein a first level exposes the conductive surface of the carrier. A first metal is electrochemically deposited on the conductive surface in first regions of the first level. A circuit material is deposited to cover the first metal. The template is etched until a second level of the template exposes the conductive surface in second regions on opposite sides of the first regions. A second metal is electrochemically deposited on the conductive surface in the second regions. The template of deposited materials is transferred from the carrier to a substrate.

Templated circuitry fabrication

A method for fabrication of passive electronic components includes disposing a sacrificial layer on a carrier and forming a curable resin layer on top of the sacrificial layer and patterning the curable resin to form a cured resin template having multiple pattern levels. A metal material is deposited into the first pattern level to form a first structure. A dielectric material is then formed on exposed portions of the first structure. A nonselective subtractive process is used to expose the sacrificial layer in a bottom of the second pattern level and metal material is deposited into the second pattern level and built up to include a portion which crosses over the dielectric material.

Fabrication of passive electronic components

A method of manufacturing an electronic component comprising at least one n- or p-doped portion, comprising the steps of: co-depositing inorganic semi-conducting nanoparticles and dopant on a substrate, the nanoparticles being a group four element such as silicon or germanium; fusing the nanoparticles by heating to form a continuous layer; and subsequently; and, recrystallising the layer.

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Dublin, Ireland

Lorraine Byrne