Applied Materials, Inc.

Alta Devices, Inc.

Utica Leaseco, LLC

Lori D Washington

Sandeep Nijhawan

David P Bour

Jacob W Smith

Gregg Higashi

Gang He

Nyi O Myo

Khurshed Sorabji

Ronald R Stevens

Arkadii V Samoilov

Lance A Scudder

Brian Hayes Burrows

Alexander Tam

Faran Nouri

Jacob Grayson

Victor Moroz

Brendan M Kayes

Kenric T Choi

David J Eaglesham

Sumedh Acharya

Herman Diniz

Andrew James Ritenour

Ileana Rau

Claudio Canizares

James D Felsch

David K Carlson

Zhiyuan Ye

Schubert S Chu

Alexander N Lerner

Andreas G Hegedus

Jie Su

Garry K Kwong

Nikhil Jain

Shahab Khandan

Christopher T Fulmer

Hua Chung

Errol Antonio C Sanchez

Yihwan Kim

Yi-Chiau Huang

Roger N Anderson

Shu-Kwan Danny Lau

Paul B Comita

Martin A Hilkene

Olga Kryliouk

Dale R Dubois

Richard Omar Collins

Ali Zojaji

Jean Rene Vatus

Xianzhi Tao

Sang Won Kang

Sunderraj Thirupapuliyur

Dong Hyung Lee

Manish Hemkar

Brendan McDougall

Chen-Ying Wu

John Boland

Bradley Mitchell Curelop

Papo Chen

Lori A Callaghan

Steve Park

Rosemary Twist

Sandeep Nijhawa

A method and apparatus for a process chamber for thermal processing is described herein. The process chamber is a dual process chamber and shares a chamber body. The chamber body includes a first and a second set of gas inject passages. The chamber body may also include a first and a second set of exhaust ports. The process chamber may have a shared gas panel and/or a shared exhaust conduit.

Multi-thermal CVD chambers with shared gas delivery and exhaust system

A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.

Structure and material engineering methods for optoelectronic devices signal to noise ratio enhancement

Aspects of the disclosure relate to processes for epitaxial growth of Group III/V materials at high rates, such as about 30 &#x3bc;m/hr or greater, for example, about 40 &#x3bc;m/hr, about 50 &#x3bc;m/hr, about 55 &#x3bc;m/hr, about 60 &#x3bc;m/hr, about 70 &#x3bc;m/hr, about 80 &#x3bc;m/hr, and about 90-120 &#x3bc;m/hr deposition rates. The Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. The Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers containing gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.

Methods for high growth rate deposition for forming different cells on a wafer

A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.

Optoelectronic devices manufactured using different growth substrates

Methods of manufacturing optoelectronic devices using different growth substrates

A growth structure having a lattice transition under a release layer is used as a seed crystal for growth of optoelectronic devices. The optoelectronic device can be a single- or multi-junction photovoltaic device. The release layer can be selectively removed in an epitaxial lift-off (ELO) process to separate the optoelectronic device from the growth structure and leave the region with the lattice transition intact to reuse the growth structure to grow additional devices. A manufacturing method is described that includes providing a growth structure having a substrate and a lattice transition from a first lattice constant to a second lattice constant, depositing a release layer on the growth structure, depositing on the release layer an epitaxial layer having a lattice constant that matches the second lattice and including an optoelectronic device, and removing the release layer to separate the epitaxial layer and the optoelectronic device from the growth structure.

Growth structure under a release layer for manufacturing of optoelectronic devices

An example method for chemical vapor deposition (CVD) of thin films includes providing a deposition zone in a reaction chamber having a fixed showerhead assembly that introduces CVD reactive gases under positive pressure into the deposition zone. The example method also includes moving a substrate carrier beneath the showerhead assembly in the reaction chamber, the substrate carrier supports and transports at least one substrate within the reaction chamber so as to be subjected to a CVD process by the CVD reactive gases. The example method also includes providing a liner assembly shrouding the deposition zone and including at least one partial enclosure around the deposition zone isolating the deposition zone and the substrate carrier, whereby solid reaction byproducts are plated onto material in the liner assembly and gaseous reaction byproducts flow radially outward, the liner assembly being mounted on the substrate carrier for motion with the substrate carrier.

Methods for chemical vapor deposition (CVD) in a movable liner assembly

A showerhead for a semiconductor processing reactor formed by an array of showerhead tiles. Each showerhead tile has a plurality of process gas apertures, which may be in a central area of the tile or may extend over the entire tile. Each showerhead tile can be dimensioned for processing a respective substrate or a plurality of substrates or the array can be dimensioned for processing a substrate. An exhaust region surrounds the process gas apertures. The exhaust region has at least one exhaust aperture, and may include an exhaust slot, a plurality of connected exhaust slots or a plurality of exhaust apertures. The exhaust region surrounds the array of showerhead tiles, or a respective portion of the exhaust region surrounds the plurality of process gas apertures in each showerhead tile or group of showerhead tiles. A gas curtain aperture may be between the exhaust region and the process gas apertures of one of the showerhead tiles or adjacent to the central area of the tile.

Tiled showerhead for a semiconductor chemical vapor deposition reactor

A chemical vapor deposition (CVD) reactor comprises a deposition zone, a substrate carrier and a liner assembly. The deposition zone is constructed so as to have a positive pressure reactant gases fixed showerhead introducing reactant gas supporting thin film CVD deposition. The substrate carrier movably supports a substrate and the liner assembly within the deposition zone and is heated so as to be subjected to a CVD process. The liner assembly partly encloses selected portions of the deposition zone, particularly portions of the substrate carrier and thereby enclose a hot zone surrounding a substrate to be processed so as to retain heat in that zone but allows gas flow radially outwardly toward walls of a surrounding cold-wall reactor with exhaust ports surrounding the deposition zone that exhaust spent reactant gases. The liner assembly is a sink for solid reaction byproducts while gaseous reaction byproducts are pumped out at the exhaust ports. The liner assembly is linearly movable away from the fixed showerhead.

Movable liner assembly for a deposition zone in a CVD reactor

A method and apparatus for removing deposition products from internal surfaces of a processing chamber, and for preventing or slowing growth of such deposition products. A halogen containing gas is provided to the chamber to etch away deposition products. A halogen scavenging gas is provided to the chamber to remove any residual halogen. The halogen scavenging gas is generally activated by exposure to electromagnetic energy, either inside the processing chamber by thermal energy, or in a remote chamber by electric field, UV, or microwave. A deposition precursor may be added to the halogen scavenging gas to form a deposition resistant film on the internal surfaces of the chamber. Additionally, or alternately, a deposition resistant film may be formed by sputtering a deposition resistant metal onto internal components of the processing chamber in a PVD process.

Method of decontamination of process chamber after in-situ chamber clean

Embodiments of the invention generally relate processes for epitaxial growing Group III/V materials at high growth rates, such as about 30 &#x3bc;m/hr or greater, for example, about 40 &#x3bc;m/hr, about 50 &#x3bc;m/hr, about 55 &#x3bc;m/hr, about 60 &#x3bc;m/hr, or greater. The deposited Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. In some embodiments, the Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers which contain gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.

Method of high growth rate deposition for group III/V materials

A method and apparatus that may be utilized for chemical vapor deposition and/or hydride vapor phase epitaxial (HVPE) deposition are provided. In one embodiment, a metal organic chemical vapor deposition (MOCVD) process is used to deposit a Group III-nitride film on a plurality of substrates. A Group III precursor, such as trimethyl gallium, trimethyl aluminum or trimethyl indium and a nitrogen-containing precursor, such as ammonia, are delivered to a plurality of straight channels which isolate the precursor gases. The precursor gases are injected into mixing channels where the gases are mixed before entering a processing volume containing the substrates. Heat exchanging channels are provided for temperature control of the mixing channels to prevent undesirable condensation and reaction of the precursors.

Multi-gas straight channel showerhead

A chemical vapor deposition reactor has one or more deposition zones bounded by gas flow virtual walls, within a housing having closed walls. Each deposition zone supports chemical vapor deposition onto a substrate. Virtual walls formed of gas flows laterally surround the deposition zone, including a first gas flow of reactant gas from within the deposition zone and a second gas flow of non-reactant gas from a region laterally external to the deposition zone. The first and second gas flows are mutually pressure balanced to form the virtual walls. The virtual walls are formed by merging of gas flows at the boundary of each deposition zone. The housing has an exhaust valve to prevent pressure differences or pressure build up that would destabilize the virtual walls. Cross-contamination is reduced, between the deposition zones and the closed walls of the housing or an interior region of the housing outside the gas flow virtual walls.

CVD reactor with gas flow virtual walls

A showerhead for a semiconductor-processing reactor formed by an array of showerhead tiles. Each showerhead tile has a plurality of process gas apertures, which may be in a central area of the tile or may extend over the entire tile. Each showerhead tile can be dimensioned for processing a respective substrate or the array can be dimensioned for processing a substrate. An exhaust region surrounds the process gas apertures. The exhaust region has at least one exhaust aperture, and may include an exhaust slot, a plurality of connected exhaust slots or a plurality of exhaust apertures. The exhaust region surrounds the array of showerhead tiles, or a respective portion of the exhaust region surrounds the plurality of process gas apertures in each showerhead tile or group of showerhead tiles. A gas curtain aperture may be between the exhaust region and the process gas apertures of one of the showerhead tiles or adjacent to the central area of the tile.

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Union City, CA, United States of America

Lori D Washington