Stmicroelectronics S.r.l.

Lorenzo Cali'

Pier Luigi Rolandi

Marco Pasotti

Michele Borgatti

Francesco Lertora

A dynamically reconfigurable processing unit includes a microprocessor, and an embedded Flash memory for non-volatile storage of code, data and bit-streams. The embedded Flash includes a field programmable gate array (FPGA) port. The reconfigurable processing unit further includes a direct memory access (DMA) channel, and an S-RAM embedded FPGA for FPGA reconfigurations. The S-RAM embedded FPGA has an FPGA programming interface connected to the FPGA port of the Flash memory through the DMA channel. The microprocessor, the embedded Flash memory, the DMA channel and the S-RAM embedded FPGA are integrated as a single chip.

Reconfigurable signal processing IC with an embedded flash memory device

A method and circuit computes a Discrete Cosine Transform in a more efficient manner for improving the computation speed, thereby reducing the computation time and allowing a higher number of digital samples to be processed. The circuit provides a microcontroller that includes a parallel accumulation multiplier for performing a first transform of the input data. A further quantization step is then performed on the transformed data. Likewise, the method includes the first transform being computed by the parallel accumulation multiplier. A further quantization step is performed on the transformed data. In this respect, the method and circuit provides good performance in terms of compression rate.

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Monza, Italy

Lorenzo Cali'