Stmicroelectronics S.r.l.

Lorenzo Calí

Luca Ciccarelli

Valentina Nardone

Claudio Mucci

Pankaj Rohilla

Massimiliano Innocenti

Matteo Pizzotti

Stefania Stucchi

A System-on-Chip (SoC) may include logic blocks connected to each other and to external connections, and a hardware debug infrastructure logic connected to the logic blocks and for performing functional changes to a design layout of the SoC. The hardware debug infrastructure logic may include software re-configurable modules based upon the logic blocks obtained from substituting a mask programmable ECO base cell configured as a functional logic cell for a logic cell in the design layout.

Method for implementing functional changes into a design layout of an integrated device, in particular a system-on-chip, by means of mask programmable filling cells

A base cell for an Engineering Change Order (ECO) implementation having at least a first pair of CMOS transistors and a second pair of CMOS transistors, characterized in that said at least first pair of CMOS transistors have a common gate and said at least second pair of CMOS transistors have separate gates.

Base cell for engineering change order (ECO) implementation

Growing community of inventors

Besana Brianza, Italy

Lorenzo Calí