Intel Corporation

Long Wang

Chung-Hao Chen

Stephen H Hall, Jr

Ranjul Balakrishnan

Wei Qian

Srinivas Thota

Chi-Te Chen

Xing Jian Cai

Jue Chen

Su Mi Sam

Yihong Yang

Apparatus and methods employing twisted differential compensation for routing high-speed signals near power delivery inductors. Traces used for a high-speed differential signal including a P trace and an N trace are routed through one or more layers in a multi-layer printed circuit board (PCB) substrate and employ a twisted portion proximate to the centerline of an inductor under which portions of the P and N traces are swapped horizontally in a layer parallel to the top plane and/or are swapped vertically by swapping layers. The signal paths are routed such that a level of noise inductively coupled into the P trace and the N trace from the inductor is approximately equally. Stripline structures are used for signals that are routed under an inductor, while stripline and microstrip structures are used for signals routed adjacent to an inductor.

Twisted differential compensation for routing high-speed signals near power delivery inductors and system miniaturization

Some embodiments include apparatuses and electrical models associated with the apparatus. One of the apparatuses includes an integrated circuit having a die; a package substrate; first conductive connections coupled between the die and a first side of the package substrate; second conductive connections located on a second side of the package substrate opposite from the first side. The second conductive connections are coupled to the first conductive connections through conductive paths in the package substrate. The first conductive connections and the conductive connections are associated with an S-parameter of an electrical model of the integrated circuit package. The electrical model further includes at least one of a current value associated with a power rail of the integrated circuit package, an impedance target associated with a location at the integrated circuit package, and a mapping associated with the first and second conductive connections.

Platform power integrity design including package standard power integrity model and compact voltage regulator module model

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El Dorado Hills, CA, United States of America

Long Wang