Freescale Semiconductor,inc.

Lois E Yong

Peter R Harper

George R Leal

Dieu Van Dinh

Tu Anh Tran

Jeffrey W Metz

Richard Eguchi

Chu-Chung Lee

Tu-Anh N Tran

William M Williams

A bond pad () has a probe region () and a wire bond region () that are substantially non-overlapping. In one embodiment, the bond pad () is connected to a final metal layer pad () and extends over an interconnect region (). The bond pad () is formed from aluminum and the final metal layer pad () is formed from copper. Separating the probe region () from the wire bond region () prevents the final metal layer pad () from being damaged by probe testing, allowing for more reliable wire bonds. In another embodiment, the probe region () extends over a passivation layer (). In an application requiring very fine pitch between bond pads, the probe regions () and wire bond regions () of a plurality of bond pads formed in a line may be staggered to increase the distance between the probe regions (). In addition, forming the bond pads () over the interconnect region () reduces the size of the integrated circuit.

Semiconductor device having a bond pad and method therefor

A semiconductor device has a large number of bond pads on the periphery for wirebonding. The semiconductor device has a module as well as other circuitry, but the module takes significantly longer to test than the other circuitry. A relatively small number of the bond pads, the module bond pads, are required for the module testing due, at least in part, to the semiconductor device having a built-in self-test (BIST) circuitry. The functionality of these module bond pads is duplicated on the top surface of and in the interior of the semiconductor device with module test pads that are significantly larger than the bond pads on the periphery. Having large pads for testing allows longer probe needles, thus increasing parallel testing capability. Duplicating the functionality is achieved through a test pad interface so that the module bond pads and the module test pads do not have to be shorted together.

Integrated circuit with test pad structure and method of testing

A bond pad () has a probe region () and a wire bond region () that are substantially non-overlapping. In one embodiment, the bond pad () is connected to a final metal layer pad () and extends over an interconnect region (). The bond pad () is formed from aluminum and the final metal layer pad () is formed from copper. Separating the probe region () from the wire bond region () prevents the final metal layer pad () from being damaged by probe testing, allowing for more reliable wire bonds. In an application requiring very fine pitch between bond pads, the probe regions () and active regions () of a plurality of bond pads formed in a line may be staggered to increase the distance between the probe regions (). In addition, forming the bond pads () over the interconnect region () reduces the size of the integrated circuit.

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Austin, TX, United States of America

Lois E Yong