Commissariat a L'energie Atomique Et Aux Energies Alternatives

Globalfoundries Inc.

Loic Gaben

Nicolas Posseme

Shay Reboh

Fabrice Nemouchi

Cyrille Le Royer

Markus Lenski

Elliot John Smith

Carsten Peters

Marcus Wolf

Method for producing a semiconductor device, including:

Method for producing at least one device in compressive strained semiconductor

A process for fabricating an integrated circuit is provided, including steps of providing a substrate including a silicon layer, a layer of insulator a layer of hard mask and accesses to first and second regions of the silicon layer; forming first and second deposits of SiGe alloy on the first and the second regions in order to form first and second stacks; then protecting the first deposit and maintaining an access to the second deposit; then performing an etch in order to form trenches between the hard mask and two opposite edges of the second stack; then forming a tensilely strained silicon layer in the second region via amorphization of the second region; then crystallization; and enriching the first region in germanium by diffusion from the first deposit.

Method for fabricating an integrated circuit including a NMOS transistor and a PMOS transistor

In various aspects, the present disclosure relates to device structures and a method of forming such a device structure. In some illustrative embodiments herein, a device is provided, including a semiconductor substrate having a first trench formed therein, and a first trench isolation structure formed in the first trench. The first trench isolation structure includes first and second insulating liners formed adjacent inner surfaces of the first trench, wherein the first insulating liner is in direct contact with inner surfaces of the first trench and the second insulating liner is formed directly on the first insulating liner, and a first insulating filling material which at least partially fills the first trench. In some aspects, a thickness of the first insulating liner is greater than a thickness of the second insulating liner.

Front-end-of-line device structure and method of forming such a front-end-of-line device structure

Growing community of inventors

Grenoble, France

Loic Gaben