Advanced Micro Devices Corporation

Lloyd Bircher

Yasuko Eckert

Srilatha Manne

Michael J Schulte

Madhu Saravana Sibi Govindan

A system and method are presented. Some embodiments include a processing unit, at least one memory coupled to the processing unit, and at least one cache coupled to the processing unit and divided into a series of blocks, wherein at least one of the series of cache blocks includes data identified as being in a modified state. The modified state data is flushed by writing the data to the at least one memory based on a write back policy and the aggressiveness of the policy is based on at least one factor including the number of idle cores, the proximity of the last cache flush, the activity of the thread associated with the data, and which cores are idle and if the idle core is associated with the data.

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Austin, TX, United States of America

Lloyd Bircher