International Business Machines Corporation

Lloyd Andre Walls

Nam Huu Pham

Tai Anh Cao

Thanh D Trinh

Satyajit Dutta

Thai Q Nguyen

Nanju Na

Jinwoo Choi

Jose A Hejase

Francesco Preda

Daniel Mark Dreps

Daniel Douriet

Mahesh Bohra

Kevin Bills

Aquilur Rahman

Brian Leslie Singletary

Stanley Everett Schuster

Byron Lee Krauter

James Douglas Jordan

Rubina Firdaus Ahmed

Yanyan Zhang

Michael D Hasse

Mehdi Mohamed Mechaik

Tak H Ning

John Atkinson Fifield

Peter Juergen Klim

Lawrence G Heller

Herbert I Stoller

Jason R Eagle

Rosanna Mannan

Keenan Wynn Franz

Pavel Roy Paladhi

Edward S Hoyt

Nathan Lee Dunfee

Bruce J MacIsaac

Pee-Keong Or

Thai Quoc Nguyen

Tai Any Cao

Timothy A Horel

Jose A Hajase

Embodiments are directed to a method of manufacturing the printed circuit board. The PCB is a multi-layer component, including a dielectric material and an intermediate or second layer adjacently positioned with respect to the dielectric material. The intermediate layer or second layer includes a conductor and fiberglass strands, with the fiberglass strands having an associated orientation. When assembled, the fiberglass and the conductor have a matching orientation and separation distance from a source to a destination.

Method of producing printed circuit boards with routing conductors and dielectric strands

An apparatus includes a touchscreen having an input area and a processor. The apparatus also includes a memory that stores program code. The program code is executable by the processor to determine a location within the input area. The location corresponds to a position of at least a portion of an object relative to the input area. Further, the program code is executable by the processor to generate an output associated with an indication to move the object toward a region of the input area. The output is based on a comparison of the position of the object to the region. The region corresponds to a key of a keyboard.

Method and apparatus for virtual braille keyboard

An apparatus, multi-layer semiconductor substrate and system for testing a high-speed signal through a printed circuit board is provided. Embodiment of the present invention provides an apparatus comprises a multi-layer substrate, one or more transmission lines disposed within the multi-layer substrate, one or more connectors attached to the multi-layer substrate for connecting one or more test cards, a lid, comprising one or more cutouts for the one or more connectors, a clamp for compressing the multi-layer substrate against the lid, and one or more high-speed connectors attached to the one or more test cards, respectively.

High speed chip substrate test fixture

Functionality for estimating characteristics of an on-chip noise signal can be implemented on a processing module. An on-chip noise signal is determined at an on-chip determination point of a computer chip. The on-chip noise signal is converted to a frequency-varying signal using a voltage-controlled oscillator implemented on the computer chip. The frequency-varying signal is measured at an off-chip measurement point and frequency information is extracted from the frequency-varying signal. The frequency information is converted to a voltage level associated with the on-chip noise signal based on the relationship between an input voltage provided to the voltage-controlled oscillator and an output frequency generated by the voltage-controlled oscillator.

Noise modulation for on-chip noise measurement

Embodiments are directed to a printed circuit board and a method of manufacturing the printed circuit board. The PCB is a multi-layer component, including a dielectric material, an intermediate layer positioned adjacent to the dielectric material, and a conductor positioned adjacent to the intermediate layer. The intermediate layer is comprised of fiberglass strands having an associated orientation. When assembled, the fiberglass of the intermediate layer and the conductor having a matching orientation and separation distance from a source to a destination.

Printed circuit board with routing of a conductor and dielectric strands

A frequency band splitter is disclosed. The frequency band splitter includes a first, a second, and a third waveguides. A first narrow rectangular waveguide is utilized to connect the first waveguide to second waveguide. The first narrow rectangular waveguide has a first width to allow signals of a frequency band centered around a first frequency to be transmitted from the first waveguide to the second waveguide. A second narrow rectangular waveguide is utilized to connect the first waveguide to the third waveguide. The second narrow rectangular waveguide has a second width, which is different from the first width, to allow signals of a frequency band centered around a second frequency to be transmitted from the first waveguide to the third waveguide.

Method for performing frequency band splitting

A method includes manipulating at least one electric signal received from one or more electronic components to provide a slope substantially proportional to a discrete integer data value of n discrete integer data values, n being a positive integer greater than or equal to 3, said discrete integer data value represented by using one of n distinct slopes, said one of n distinct slopes to be transmitted utilizing a particular reference voltage of n predetermined reference voltages. The method further includes transmitting data as the particular reference voltage of the n predetermined reference voltages to at least one electronic component utilizing slope manipulation.

Reduced wiring requirements with signal slope manipulation

A memory system is deigned for impedance matching using a network of resistors that are tuned to reduce reflections on a shared bus. Any deviation from the matched state causes a mismatch and results in reflections on the bus. Overall signal reflections are reduced by balancing the back reflections occurring at a connector junction coupled to a pair of resistors and the back reflections occurring at the input of the DIMMs. This balance or tradeoff is achieved by changing the resistance value of the resistor pair to reduce the overall back reflections in the memory system.

Impedance matching system for DDR memory

A printed circuit board is disclosed. The printed circuit board includes a first signal transmission layer, a via and a second signal transmission layer. The via connects the first signal transmission layer to the second signal transmission layer. The via includes a first region made of a first dielectric material having a first dielectric constant, and a second region made of a second dielectric material having a second dielectric constant lower than the first dielectric constant. The via allows AC Component of an electromagnetic signal to be transmitted from the first signal transmission layer to the second signal transmission layer while blocking any DC component of the electromagnetic signal.

Printed circuit board having DC blocking dielectric waveguide vias

An improved electrical connector for connecting bus lines to a card such as a memory card or media card, including a multi-level connector comprising a latching device having a plurality of insertable latch positions that advantageously allows for selectively connecting or isolating an electrical path to an adjoining connector. The connectors of unpopulated DIMM slots are disconnected from the network along with the traces that would normally form a stub with associated undesirable signal reflections that would otherwise disturb the signal transmitted to the receiving end if not properly terminated. The contacts of the edge connector itself are used as a means to selectively connect or disconnect adjacent/downstream cards in a serially cascaded architecture. The burden of the stubs due to unpopulated card slots and the need to place one card at the far end of the network are thus eliminated.

Multi-level connector and use thereof that mitigates data signaling reflections

An information handling system device includes a plurality of electronic components; an electric circuit including at least one trace for connecting two or more of the plurality of electronic components and transmitting data between the plurality of electronic components via at least one electric signal; and a substrate including an insulating material for serving as a base for the electric circuit, wherein each of the at least one electric signal transmitted between the plurality of electronic components is transmitted utilizing slope manipulation by manipulating each of the at least one electric signal to provide a slope substantially proportional to a discrete integer data value of n discrete integer data values, n being a positive integer greater than or equal to 3, said discrete integer data value represented by using one of n distinct slopes transmitted utilizing a particular reference voltage of n predetermined reference voltages.

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Austin, TX, United States of America

Lloyd Andre Walls