Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Samsung Electronics Co., Ltd.

Fuzhou Boe Optoelectronics Technology Co., Ltd.

Hangzhou H3c Technologies Co., Ltd

Lizhong Wang

Ce Ning

Tianmin Zhou

Shuilang Dong

Guangcai Yuan

Liping Lei

Rui Huang

Wei Yang

Nianqi Yao

Yunping Di

Hehe Hu

Dapeng Xue

Binbin Tong

Dongfang Wang

Xinhong Lu

Jipeng Song

Zhanfeng Cao

Jianbo Xian

Zhen Zhang

Chengfu Xu

Xiaochun Xu

Chunping Long

Fuqiang Li

Tao Yang

Zhenyu Zhang

Zheng Fang

Zhengliang Li

Chenyang Zhang

Hui Guo

Lei Yang

Jiahui Han

Zhaohui Qiang

Yupeng Gao

Jingshang Zhou

Liang Wen

Qi Yao

Chen Hui Xu

Jing Li

Zheng Liu

Shi Shu

Jing Wang

Xianqin Meng

Yong Yu

Chuanxiang Xu

Li Liu

Pengxia Liang

Jiangnan Lu

Lei Zhao

Liangliang Li

Yang Yue

Guoqiang Wang

Jin Fang Yang

Xin Xie

Qingzhao Liu

Ning Dang

Shanshan Xu

Weiting Peng

Li Qiang

Zihua Zhuang

Yawei Wang

Xiaming Zhu

Yan Qu

Chen Xu

Jinglin Li

Qiuli Wang

Wu Yang

Yu Wen

Xiaoyan Lou

Shaohui Li

Jinchao Zhang

Yinji Piao

Niangi Yao

Feihu Zhou

Chao Min

Anxi Yi

Liangxi Yao

Weijing Shi

Weiqin Wang

Lufen Tan

Yifang Huang

Changtao Liu

Ergang Zhu

Wenhua Wang

An array substrate and a display panel, relating to the technical field of display. The array substrate includes a base substrate, and a thin film transistor group which is provided on one side of the base substrate and includes at least two thin film transistors, the thin film transistors being stacked in a direction perpendicular to the base substrate.

Array substrate and display panel

An array base plate includes a substrate; and a driving transistor and a switching transistor that are located on the substrate; the driving transistor includes a semiconductor layer; the switching transistor includes an active layer and a protecting layer, and the active layer includes two opposite main surfaces and a side surface that is located between outer contours of the two main surfaces; the protecting layer is located on a main surface of the active layer that is away from the substrate and covers the main surface and the side surface; the protecting layer and the semiconductor layer are arranged in a same layer, and a material of the protecting layer and a material of the semiconductor layer are a same metal-oxide-semiconductor material; and a carrier mobility of the protecting layer is less than a carrier mobility of the active layer.

Metal-oxide thin-film transistor, array base plate and fabricating method thereof

Disclosed are a thin film transistor and a manufacturing method therefor, a displaying base plate and a displaying apparatus. The thin film transistor includes an active layer, a first insulating layer and a gate layer which are disposed in stack, wherein the active layer includes a source contact area, a drain contact area, and a channel area connecting the source contact area and the drain contact area; the channel area includes a first channel area, a first resistance area and a second channel area sequentially disposed in a first direction; the gate layer includes a first gate and a second gate which are separately disposed; an orthographic projection of the first gate on a plane where the active layer is located covers the first channel area; and an orthographic projection of the second gate on a plane where the active layer is located covers the second channel area.

Displaying base plate and manufacturing method thereof, and displaying device

A thin film transistor, a shift register unit, a gate driving circuit and a display panel are provided. The M source branches and the N drain branches extend along a first direction and are arranged at intervals; in each of the P source-drain units, the M source branches and the N drain branches are alternately arranged, and M is greater than or equal to N; a semiconductor layer includes sub-channel regions between one drain branch and one source branch adjacent to each other; a sum of widths of the sub-channel regions of the P source-drain units in the first direction is W, and an average length of the sub-channel regions of the P source-drain units in a direction perpendicular to the first direction is L; 12≤W/L≤400, P, M and N are integers greater than or equal to 1, and P×N≥4.

Thin film transistor, shift register unit, gate driving circuit and display panel

The present application provides an array substrate, a manufacturing method for the same, and a display panel. The array substrate includes a display area and a non-display area connected to the display area, and the display area includes a plurality of sub-pixels arranged in an array. The non-display area includes at least one polysilicon transistor, each of the sub-pixels includes an oxide transistor and a pixel electrode. A gate of the oxide transistor as well as a first electrode and a second electrode of the polysilicon transistor are arranged in a same layer; an active layer of the oxide transistor and the pixel electrode are arranged in a same layer, and are in contact with each other. The active layer of the oxide transistor includes an oxide semiconductor material, and the pixel electrode includes an oxide conductor material.

Array substrate and manufacturing method for the same, display panel

At least one embodiment of the present disclosure provides an oxide thin film transistor, a display device, and a preparation method of the oxide thin film transistor, and the oxide thin film transistor includes a base substrate; an oxide semiconductor layer provided on the base substrate, and an insulating layer provided on a side of the oxide semiconductor layer away from the base substrate; in which the insulating layer is made of oxide; the insulating layer includes a first insulating layer and a second insulating layer which are stacked; a density of the second insulating layer is greater than a density of the first insulating layer; and the second insulating layer is farther away from the base substrate than the first insulating layer.

Oxide thin film transistor and preparation method thereof, and display device

Provided is an array substrate. The array substrate includes a display region and a non-display region located at a periphery of the display region, wherein the array substrate includes a substrate; a first transistor and a second transistor that are disposed on the substrate, wherein the first transistor is disposed in the display region, and the second transistor is disposed in the non-display region; and a data line and a pixel electrode that are disposed in the display region, wherein the data line is disposed on a side of the first active layer close to the substrate and is lapped with the first active layer, and the pixel electrode is disposed on a side of the first gate facing away from the substrate and is lapped with the first active layer.

Array substrate and manufacturing method thereof, and display panel

A color filter, a preparation method therefore, an array substrate and a display device are provided. The color filter includes a plurality of filter units () provided on a base substrate () for transmitting light of different colors, and a light shielding layer () located between adjacent filter units () for transmitting light of different colors. The filter unit () includes a first surface facing the base substrate (), a second surface facing away from the base substrate, and a third surface connecting the first surface and the second surface. The light shielding layer () is provided on the third surface of at least one of two adjacent filter units () transmitting light of different colors.

Color filter and preparation method therefor, array substrate and display device

An array substrate and a display panel. The array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.

A video encoding method includes: based on at least one of first distortion aware information about a current encoding unit and second distortion aware information about a corresponding reference encoding unit, determining a first predicted value of the current encoding unit using at least one interpolation filter, wherein the at least one type of interpolation filter may include an artificial intelligence (AI) interpolation filter; and encoding the current encoding unit based on the first predicted value of the current encoding unit.

Video encoding/decoding method, and corresponding devices

At least one embodiment of the present disclosure provides a display panel, and the display panel includes: a first substrate and a second substrate oppositely combined with each other, the first substrate includes a base substrate, and a gate line, a first electrode, a first interlayer insulating layer, and second electrode on the base substrate; the first interlayer insulating layer includes a first via hole penetrating through the first interlayer insulating layer, the second electrode is electrically connected to the first electrode the first via hole, first support structure is provided in a region corresponding to the first via hole and on a side of the second electrode away from the base substrate; at least a part of the first support structure is located in the first via hole, an orthographic projection of the first via hole overlaps with an orthographic projection of the gate line on the base substrate.

Display panel having support structures being formed in via holes of the interlayer insulating layer

The present disclosure provides a display substrate, a display panel and a display apparatus. The display substrate includes a base substrate; a transistor, located on the base substrate, and including an active layer; and a data line, located between the active layer and the base substrate; the data line is connected with the active layer, and an orthographic projection of the active layer on the base substrate is located in an orthographic projection of the data line on the base substrate.

Display substrate, display panel and display apparatus

A display substrate, a display panel and a display apparatus. The display substrate includes a first base substrate; a plurality of gate lines and a plurality of data lines which are arranged on a side of the first base substrate; the plurality of gate lines and the plurality of data lines are arranged to be intersected with each other and insulated from each other; a planarization layer, arranged on a side of the gate lines and the data lines away from the first base substrate, and including a first via hole; and a supporting structure, arranged on a side of the planarization layer away from the first base substrate and filled into the first via hole; and in a direction perpendicular to the first base substrate, a height of the supporting structure is greater than a depth of the first via hole.

A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.

Provided is a substrate. The substrate includes a base substrate; and a plurality of sub-pixel structures arranged in an array on the base substrate, wherein the sub-pixel structure comprises: a thin film transistor disposed on the base substrate, the thin film transistor comprising a source and a drain; an insulating layer disposed on a side of the thin film transistor distal from the base substrate, a first via hole being formed in the insulating layer; a pixel electrode disposed on a side of the insulating layer distal from the base substrate, the pixel electrode being electrically connected to either the source or the drain through the first via hole; and a filling block disposed at the first via hole.

Substrate, method for manufacturing same, and display panel

Growing community of inventors

Beijing, China

Lizhong Wang