Silicon Storage Technology, Inc.

Microchip Technology Inc.

Liyang Zhang

Mau-Chung Frank Chang

Pei-Ming Daniel Chow

Bun Kobayashi

Mauchung (Frank) Chang

Peiming (Daniel) Chow

A front-end module comprises a plurality of chips that includes first and second functional blocks and an interconnection circuit. The first functional block is formed using a first process type and includes a digital control circuit that generates a digital control signal in response to an external control signal from outside the front end module. The second functional block is formed using a second process type and includes a digitally controlled circuit controlled by the digital control signal generated by the first functional block. The second process type is different from the first process type. The interconnection circuit couples the digital control circuit and the digitally controlled circuit to provide the digital control signal to the digitally controlled circuit. In one aspect, the first functional block may be a low noise amplifier formed by a pseudomorphic high electron mobility transistor process. The second functional block may be a power amplifier formed by a heterojunction bipolar transistor process. In another aspect, the first functional block may be a power amplifier formed by a heterojunction bipolar transistor process. The second functional block may be a low noise amplifier formed by a pseudomorphic high electron mobility transistor process.

Digital control interface in heterogeneous multi-chip module

An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal.

Integrated power detector with temperature compensation for fully-closed loop control

A semiconductor structure is fabricated with two different portions. The first portion forms a first transistor, while the second portion forms a second transistor. Notably, portions of the first transistor also a make up portions of the second transistor. That is, both the first transistor and the second transistor are made of portions of the same structure.

Multiple-transistor structure systems and methods in which portions of a first transistor and a second transistor are formed from the same layer

RF power detector employing an envelope amplifier circuit and a current mirror circuit. The output of the current mirror circuit supplies a bias voltage for biasing the output of the envelope amplifier circuit. Furthermore, the output of the envelope amplifier circuit is fed back to the output of the current mirror circuit so as to reduce the magnitude of the bias signal according to the magnitude of the amplified RF signal envelope. In this manner, the overall gain of the RF power detector can be selectively reduced, resulting in an RF power detector having a more linearized dynamic range and greater ability to compensate for variation in gain caused by temperature.

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West Hills, CA, United States of America

Liyang Zhang