Intel Corporation

Liwen Jin

Dilan Seneviratne

Ching-Ping Janet Shen

Deepak Arora

Charan K Gurumurthy

Ravi Shankar

Vinodhkumar Raghunathan

Generally discussed herein are systems and apparatuses that can include a releasable core panel. The disclosure also includes techniques of making and using the systems and apparatuses. According to an example a technique of making a releasable core panel can include coupling an inner foil to a base, situating an adhesive layer on the inner foil, such that the inner foil is substantially flush with a periphery of the base, situating an outer conductive foil on the adhesive layer, or covering an interface between the adhesive layer, the inner foil and the outer conductive foil with a protective material.

Panel with releasable core

Electronic assemblies and methods for their manufacture are described, including those related to the formation of an assembly including a carrier and a resin coated copper layer positioned on the carrier. The resin coated copper layer includes a first layer comprising a resin and a second layer comprising copper, with the first layer bonded to the second layer. The first layer of the resin coated copper is positioned between the carrier and the second layer of the resin coated copper. An opening is formed in the second layer of the resin coated copper. A die is positioned in the opening. A plurality of dielectric layers and metal pathways are positioned on the second layer and on the die. Other embodiments are described and claimed.

Embedded architecture using resin coated copper

An example includes a die package including a microelectronic die having a lower die surface, an upper die surface parallel to the lower die surface, and a die side, the microelectronic die including an active region and an inactive region. The example optionally includes a release layer having a lower release layer surface, an upper release layer surface parallel to the lower release layer surface, and at least one release layer side, the release layer coupled with the upper surface of the microelectronic die in thermal communication with the inactive region of the die and electrically insulated from the active region. The example optionally includes an encapsulation material encapsulating the die side and the release layer side and lower release layer surface, the encapsulation material including a lower surface substantially parallel to the die lower surface and an upper surface substantially parallel to the die upper surface.

Growing community of inventors

Chandler, AZ, United States of America

Liwen Jin