Skyworks Solutions, Inc.

Berex Corporation

Mobix Labs, Inc.

Skyworks Soultions, Inc.

Octotech, Inc.

Lisette L Zhang

Oleksandr Gorbachov

Lothar Musiol

Huan Zhao

Floyd Ashbaugh

Qiang Li

Yongxi Qian

Aydin Seyedi

Yang Liu

Parham Khajeh Hesamaddin

Stephen Milkovits

Hyon Su Han

Raymond Biagan

Xu Shao

Lothar Johannes Musiol

A metal oxide semiconductor field effect transistor preferably fabricated with a silicon-on-insulator process has a first semiconductor region and a second semiconductor region in a spaced relationship thereto A body structure is defined by a channel segment between the first semiconductor region and the second semiconductor region, and a first extension segment structurally contiguous with the channel segment. A shallow trench isolation structure surrounds the first semiconductor region, the second semiconductor region, and the body structure, with a first extension interface being defined between the shallow trench isolation structure and the first extension segment of the body structure to reduce leakage current flowing from the second semiconductor region to the first semiconductor region through a parasitic path of the body structure.

Low noise amplifier transistors with decreased noise figure and leakage in silicon-on-insulator technology

A resonant switch with a first port and a second port has a capacitor connected thereto. A triple inductor network has a center inductor connected to the first port and the second port, and first and second peripheral inductors each electromagnetically coupled thereto. In a deactivated state, the center inductor and the capacitor define a parallel resonance at a predefined operating frequency range, and in an activated state, insertion loss associated with the center inductor is substantially minimized to metallic trace loss attributable thereto.

Low-loss mm-wave CMOS resonant switch

An ultra-high coupling factor transformer has a plurality of conductive layers, a primary winding inductor, and a secondary winding inductor. The primary winding inductor is defined by a plurality of turns and disposed on a first one of the plurality of conductive layers and extends to a second one of the plurality of conductive layers. The secondary winding inductor is defined by a plurality of turns and disposed on the first one of the plurality of conductive layers and extends to the second one of the plurality of conductive layers. The primary winding is vertically and horizontally cross coupled with the secondary winding inductor, and defines a mutual coupling inductance from surrounding directions.

Ultra-high coupling factor monolithic transformers for integrated differential radio frequency amplifiers in system-on-chip devices

A phase shifter with a first port and a second port has a triple inductor network with a center inductor connected to the first port and the second port, and first and second peripheral inductors each electromagnetically coupled to the center inductor. A resistance switch network that is connected to the first and second peripheral inductors. The resistance switch network is selectively activatable to set a first state defined at least by a first resistance in a series circuit with the first and second peripheral inductors, a second state defined at least by a second resistance in the series circuit, and a third state defined at least by a third resistance in the series circuit. A transmission signal from the first port to the second port is shifted in phase by a prescribed angle corresponding to forward transmission coefficients for the first state, second state, and third state.

Low-loss bi-directional passive LSB phase shifter in mm-wave CMOS

An integrated circuit architecture and circuitry is defined by a die structure with a plurality of exposed conductive pads arranged in a grid of rows and columns. The die structure has a first operating frequency region with a first transmit and receive chain, and a second operating frequency region with a second transmit chain and a second receive chain. There is a shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region with a shared power supply input conductive pad connected to the first transmit chain, the second transmit chain, the first receive chain, and the second receive chain, and a shared power detection output conductive pad connected to the first transmit chain and the second transmit chain.

Multiple band multiple mode transceiver front end flip-chip architecture and circuitry with integrated power amplifiers

A zero insertion loss directional coupler includes an input port, an antenna port, an isolation port, and a detect port. The coupler has a first signal trace, a second signal trace, and an inductive winding. The first signal trace is on one of two layers and is connected to the input port and the antenna port, while the inductive winding is on another one of the two layers. A first terminal of the inductive winding is connected to the isolation port. A first terminal of the second signal trace is connected to the detect port and a second terminal of the second signal trace is connected to a second terminal of the inductive winding.

Zero insertion loss directional coupler for wireless transceivers with integrated power amplifiers

An RF power limiter and ESD protection circuit has a set of two CMOS FETs each configured to perform a diode function with a defined forward voltage and arranged in an anti-parallel configuration and coupled between the input terminal and the ground terminal. When an RF signal is applied symmetrically to the input terminal and ground terminal it becomes symmetrically attenuated when the signal level exceeds the defined forward voltage of the diode configured CMOS FETs. In the ESD protection mode one of the CMOS FETs acts as a grounded gate NMOS transistor with SCR action to provide for mitigation of voltage and current over-stress of transistors utilized in RF transceiver circuits. Generally, the circuit architectures allow input power levels to be limited to an extent that reliable operation can be maintained.

CMOS RF power limiter and ESD protection circuits

An RF receiver circuit configuration and design limited by conditions and frequencies to simultaneously provide steady state low-noise signal amplification, frequency down-conversion and image signal rejection. The invention provides combined circuits of an RF transceiver architecture that measure antenna reflected power relative to forward power using the error amplifier signal to adjust the gain of the variable gain amplifier in order to compensate for the mismatch between forward reflected power and forward power at the antenna in order to achieve constant radiated power. The RF receiver circuit may be implemented as one of a CMOS single chip device or as part of an integrated system of CMOS components.

RF power amplifier circuits for constant radiated power and enhanced antenna mismatch sensitivity

A radio frequency low noise amplifier circuit with a receive signal input, a receive signal output, and a voltage source include a low noise amplifier and a coupled inductor circuit with a primary inductive chain connected to the output of the low noise amplifier and to the voltage source. The coupled inductor circuit further includes a secondary inductive chain with a first inductor electromagnetically coupled to the primary inductive chain, and a second inductor in series with the first inductor and magnetically coupled to the primary inductive chain. The second inductor is connected to a feedback node of the low noise amplifier. There is an output matching network connected to the first inductor of the secondary inductive chain and to the receive signal output.

High-gain low noise figure low noise complementary metal oxide semiconductor amplifier with low current consumption

A directional coupler has a first port, a second port, a third port, and a fourth port. A first inductor has a first connection to the first port and a second connection to the second port. A second inductor has a first connection to the third port and a second connection to the fourth port. A first compensation capacitor is connected to the first port and the third port. A second compensation capacitor is connected to the first port and the fourth port. The first inductor is inductively coupled to the second inductor by a predefined coupling factor, the third port is isolated from the first port by a predefined first isolation factor, and the fourth port is isolated from the first port by a predefined second isolation factor. An inductance of the second inductor is substantially greater than an inductance of the first inductor.

Radio frequency couplers with high directivity

A radio frequency (RF) power amplifier circuit with a diode linearizer circuit. The power amplifier circuit has an input and an output, as well as a power amplifier transistor with a first terminal connected to the input, a second terminal connected to the output, and a third terminal. The linearizer circuit is connected to the third terminal and to ground, and has a non-linear current-voltage curve as well as a non-linear capacitance. The linearizer circuit reduces inter-modulation products in a current through the power amplifier transistor from the second terminal to the third terminal that corresponds to an input signal applied to the input.

RF power amplifiers with diode linearizer

A radio frequency (RF) transmit-receive switch has an antenna port, first and second transmit differential ports and first and second receive differential ports. Transmit transistor switches are connected to the transmit differential ports. Primary and secondary windings of a transmit coupled inductor transformer are connected to the transmit transistor switches. Receive transistor switches are connected to the receive differential ports. Primary and secondary windings of a receive coupled inductor transformer are connected to the receive transistor switches. A first balun inductive winding is connected to the antenna port, and a second balun inductive winding is connected to the transistor switches.

Complementary metal oxide semiconductor differential antenna transmit-receive switches with power combining circuitry for orthogonal frequency-division multiplexing systems

A radio frequency (RF) filter circuit for rejecting one or more spurious components of an input signal has a first resonator circuit including a first capacitor and a first coupled inductor pair of a first inductor and a second inductor, and a second resonator circuit with a second capacitor and a second coupled inductor pair of a third inductor and a fourth inductor. First and second resonator coupling capacitors are connected to the first resonator circuit and the second resonator circuit. A first port and a second port are connected to the first resonator circuit and the second resonator, with the filtered signal of the input signal passed through both the first resonator circuit and the second resonator circuit being output.

Coupled resonator on-die filters for WiFi applications

An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.

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Irvine, CA, United States of America

Lisette L Zhang