Motorola Corporation

Lisa K Garling

Philip J Tobin

Hsing-Huang Tseng

Vida Ilderem

Laureen H Parker

David G Kolar

Ting Chen Hsu

Robert H Reuss

Ping Wang

An annealed amorphous silicon layer is formed prior to forming field isolation regions when using in a LOCOS field isolation process. The annealed amorphous silicon layer helps to reduce encroachment compared to conventional LOCOS field isolation process and helps to reduce the likelihood of forming pits within a substrate compared to a PBL field isolation process. The annealed amorphous silicon layer may be used in forming field isolation regions that defines the active regions between transistors including MOSFETs and bipolar transistors. Doped silicon or a silicon-rich silicon nitride layer may be used in place of conventional materials. The anneal of the amorphous silicon layer may be performed after forming a silicon nitride layer if the silicon nitride layer is deposited at a temperature no higher than 600 degrees Celsius.

Process for forming field isolation

Process for forming field isolation and a structure over a semiconductor

A method for making bipolar transistors with a first and a second buried collectors that are separated wherein the first and second buried collectors are separated by a p buried layer that is made by depositing a heavily doped boron layer and subsequently diffusing boron from the boron layer into the area between the first and second buried collector.

Method for making buried isolation

Growing community of inventors

Mesa, AZ, United States of America

Lisa K Garling