Marvell Israel (misl) Ltd.

Marvell Israel (m.l.s.l) Ltd.

Lior Valency

Gil Levy

Carmi Arad

David Melman

Rami Zemach

Tal Mizrahi

Amir Roitshtein

Ilan Yerushalmi

Ilan Mayer-Wolf

Tsahi Daniel

Dror Bromberg

Aron Wohlgemuth

Sharon Ulman

Amir Bishara

A packet received by a network device via a network. A first portion of the packet is stored in a packet memory, the first portion including at least a payload of the packet. The packet is processed based on information from a header of the packet. After the packet is processed, a second portion of the packet is stored in the packet memory, the second portion including at least a portion of the header of the packet. When the packet is to be transmitted the first portion of the packet and the second portion of the packet are retrieved from the packet memory, and the first portion and the second portion are combined to generate a transmit packet. The transmit packet is forwarded to a port of the network device for transmission of the transmit packet via port of the network device.

Method and apparatus for processing packets in a network device

A packet received by a network device via a network. A first portion of the packet is stored in a packet memory, the first portion including at least a payload of the packet. The packet is processed based on information from a header of the packet. After the packet is processed, a second portion of the packet is stored in the packet memory, the second portion including at least a portion of the header of the packet. When the packet is to be transmitted the first portion of the packet and the second portion of the packet are retrieved from the packet memory, and the first portion and the second portion are combined to generate a transmit packet. The transmit packet is forwarded to a port of the network device for transmission of the transmit packet via port of the network device

Aspects of the disclosure provide a circuit that includes a plurality of memory access circuits configured to access a memory to read or write data of a first width. The memory includes a plurality of memory banks that are organized in hierarchy. Further, the circuit includes a plurality of interface circuits respectively associated with the plurality of memory access circuits. Each interface circuit is configured to receive memory access requests to first level memory banks from an associated memory access circuit, segment the memory access requests into sub-requests to corresponding second level memory banks, buffer the sub-requests into buffers associated with the second level memory banks. In addition, the circuit includes arbitration circuitry configured to control multiplexing paths from the buffers to the second level memory banks to enable, in a same memory access clock, memory accesses by the memory access circuits.

Method and apparatus for memory access

Aspects of the disclosure provide a circuit that includes a content addressable memory (CAM) array, a first mask circuit and a first encoder. The CAM array has CAM entry lines to be compared with a search key. The CAM array is configured to output a match result indicative entry lines that match the search key. The first mask circuit is configured to selectively mask first one or more portions of the match result to generate a first masked match result indicative first entry lines among the entry lines that match the search key. The first encoder is configured to encode the first masked match result to identify a matching entry line in the first entry lines as a first search result.

Parallel multi-lookup TCAM

Aspects of the disclosure provide a packet processing system. The packet processing system includes a plurality of processing units, a ternary content addressable memory (TCAM) engine, and an interface. The plurality of processing units is configured to process packets received from a computer network, and to perform an action on a received packet. The action is determined responsively to a lookup in a table of rules to determine a rule to be applied to the received packet. The TCAM engine has a plurality of TCAM banks defining respective subsets of a TCAM memory space to store the rules. The interface is configured to selectably associate the TCAM banks to the processing units. The association is configurable to allocate the subsets of the TCAM memory space to groups of the processing units to share the TCAM memory space by the processing units.

Architecture for TCAM sharing

A network switch device comprises a packet processor configured to: write, to a memory, at least a payload of a multicast packet received via one of a plurality of ports, determine that a plurality of instances of the multicast packet are to be transmitted, generate, using an original header of the multicast packet, one or more additional headers, write, to the memory, a plurality of headers including (i) the original header, and (ii) the one or more additional headers in the memory, link each header in the plurality of headers stored in the memory to a location of the payload in the memory, and transmit a plurality of instances of the multicast packet via one or more ports including, for each instance of the multicast packet, reading (i) a respective one of the headers from the memory and (ii) the payload from the location in the memory.

Processing multicast packets in a network device

In a method for storing packets in a network device, a memory space spanning a plurality of external memory devices is partitioned into a plurality of multi-buffers. Each multi-buffer spans multiple memory devices in the plurality of external memory devices. Each multi-buffer is partitioned into a plurality of buffer chunks and the plurality of buffer chunks are distributed among the multiple memory devices Further, a packet is divided into one or more packet chunks including at least a first packet chunk. The one or more packet chunks are stored in one or more consecutive buffer chunks of at least a first multi-buffer of the plurality of multi-buffers.

External memory management in a network device

The invention provides novel methods of forwarding multicast data packets to selected egress ports in a MAC bridging environment. A multicast data packet is received via an ingress port. A source IP address and a destination multicast IP address are retrieved from the multicast packet. In a forwarding database, different groups of egress ports correspond to different combinations of a source address, a destination multicast address, and a virtual local area network identifier (VLAN-ID). The forwarding database is accessed, based on the retrieved source address, the retrieved destination multicast address, and a VLAN-ID, to thereby determine a corresponding group of egress ports. The multicast packet is then forwarded to the corresponding group of egress ports.

Growing community of inventors

Tel Aviv, Israel

Lior Valency