Hymite A/s

TSMC Solid State Lighting Ltd.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Epistar Corporation

Lior Shiv

Matthias Heschel

Jochen Kuhmann

Kristian Blidegn

Christoffer Graae Greisen

Steen Weichel

John Nicholas Shepherd

Non-planar via designs for sub-mounts on which to mount a LED or other optoelectronic device include a continuous layer of metal to conduct the current from the front-side (e.g., LED side) to the backside (e.g., SMD side) through the via and to provide a sufficiently stable and reliable under bump metallization for SMD soldering. Each UBM can be structured so that it does not fully cover the sidewall surfaces of the via that forms the front-to-backside interconnect. In some implementations, each via structure for the feedthrough metallization extends to a respective side-edge of the sub-mount.

Opto-electronic device package with a semiconductor-based sub-mount having SMD metal contacts

A method of fabricating a package with a light emitting device includes depositing a first metallization to form a conductive pad on which the light emitting device is to be mounted and to form one or more feed-through interconnections extending through a semiconductor material that supports the conductive pad. Subsequently, a second metallization is deposited to form a reflective surface for reflecting light, emitted by the light emitting device, through a lid of the package. Deposition of the second metallization is de-coupled from deposition of the first metallization.

Fabrication process for package with light emitting device on a sub-mount

Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a preexisting semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.

Formation of through-wafer electrical interconnections and other structures using a thin dielectric membrane

Providing through-wafer interconnections in a semiconductor wafer includes forming a sacrificial membrane in a pre-existing semiconductor wafer, depositing metallization over one side of the wafer so as to cover exposed portions of the sacrificial membrane facing the one side of the wafer, removing exposed portions of the sacrificial membrane facing the other side of the wafer, and depositing metallization over the other side of the wafer so as to contact the previously deposited metallization. Techniques also are disclosed for providing capacitive and other structures using thin metal membranes.

Techniques are disclosed for fabricating a relatively thin package for housing a micro component, such as an opto-electronic or MEMs device. The packages may be fabricated in a wafer-level batch process. The package may include hermetically sealed feed-through electrical connections coupling the micro component to electrical contacts on an exterior surface of the package.

Method of fabricating a package for a micro component

A method of fabricating silicon micro-mirrors includes etching from opposite sides of a silicon wafer with a polished surface on at least one of the opposite sides, to form silicon bars each having a parallelogram-shaped cross-section and including a portion of the polished surface. At least one of the silicon bars is mounted on a mounting surface. The polished surface of the silicon bar may be used to reflect optical signals.

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Hilleroed, Denmark

Lior Shiv