Via Telecom Co., Ltd.

Linley Young

Alon Saado

Muhammad Afsar

Anand C Monteiro

An apparatus comprising a circuit configured to be tested and a plurality of test blocks within the circuit. Each of the test blocks generally comprises (i) a plurality of sequential elements and (ii) a plurality of logic elements. Each of the test blocks are configured to operate (a) in a first mode comprising a shift mode and (b) a second mode comprising a capture mode. The shift mode generally operates with multiple scan clocks that are clocked simultaneously. The capture mode generally operates with multiple scan clocks, but only one of which is toggled at a time.

Method and/or apparatus for performing static timing analysis on a chip in scan mode with multiple scan clocks

A method and apparatus is described, by means of which a host data communication device obtains the effects of a desired data communication protocol, such as flow control, that may not be supported by a client device. To obtain the effects of the desired protocol, the host invokes a different protocol supported by the client, for example retransmission, by presenting an appropriate protocol-initiation signal, for example by asserting an error bit on a bidirectional connection to the client. Invoking the supported protocol repetitively, if necessary, the host interprets the client response to the invocation to achieve substantially the same effect as the desired protocol. Thus, a repetitive retransmission request by the host may have the effect of a flow hold request.

Flow control for interfaces providing retransmission

An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a gated clock signal in response to (i) a write enable signal and (ii) a system clock signal. The gated clock signal is pulsed active while the write enable signal is active. The second circuit may be configured to generate the write enable signal.

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Linley Young