Lsi Corporation

Agere Systems Inc.

Marvell International Limited

Marvellworld Trade Ltd.

Lingyan Sun

Hongwei Song

Jingfeng Liu

Zining Wu

Nedeljko Varnica

Seo-How Low

Gregory Burd

Rui Cao

Haitao Xia

Yuan Xing Lee

Yu Liao

Haotian Zhang

Lu Pan, Sr

YuanXing Lee

A method for detecting an information pattern includes obtaining a first sample stream and a second sample stream. The first sample stream and the second sample stream are obtained by sensing recorded information at a target location of a storage medium using a first sensor and a second sensor, respectively. A first metric is computed by comparing the first sample stream to a reference pattern representative of a target information pattern to be detected. A second metric is computed by comparing the second sample stream to the reference pattern. A combined metric is computed by combining the first metric and second metric using a weighting function. The target information pattern is detected using the combined metric.

Synchronization mark detection for multi-dimensional magnetic recording

Various embodiments of the present invention provide systems and methods for reducing filter sensitivities. As an example, reduced sensitivity filter circuits are discussed that include a digital filter and a filter tap adaptation circuit. The digital filter is operable to filter a received input based at least in part on a plurality of filter taps, and to provide a filtered output. The filter tap adaptation circuit is operable to receive an error value and a weighting control value, and to adaptively calculate at least one of the filter taps using the error value and the weighting control value.

Systems and methods for reducing filter sensitivities

Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes: a data detector circuit, a calibration circuit, and an enable circuit. The data detector circuit is operable to apply a data detection algorithm to a data input to yield a detected output based at least in part on control values. The calibration circuit operable to update the control values based at least in part on the data input, the detected output, and a calibration circuit enable. The calibration circuit enable is generated by the enable circuit based at least in part on the detected output.

Systems and methods for reliability assisted noise predictive filtering

Systems and methods for constructing concatenated codes for data storage channels, such as holographic storage channels, are provided. The concatenated codes include an outer BCH code and an inner iteratively decodable code, such as an LDPC code or turbo code. The correction power and coding rate of one or both of the codes may be programmable based on the channel characteristics and the desired SNR coding gain. The correction power and/or coding rate of the inner and/or outer code may also be dynamically adjusted in real-time to compensate for time-varying error conditions on the channel.

Concatenated codes for holographic storage

Systems and methods for out of order memory management.

Systems and methods for out of order Y-sample memory management

Systems, methods, and apparatus are provided for increasing decoding throughput in an LDPC decoder, such as in a wireless communications receiver or in a data retrieval unit. A checker-board parity check matrix and edge-based LDPC decoder structure are provided in which both vertical and horizontal processors are used simultaneously. Horizontal processors may be grouped into type-A and type-B horizontal processors, and similarly, vertical processors may be grouped into type-A and type-B vertical processors. Type-A processors may be used in different clock cycles than type-B processors to update memory locations in a decoding matrix without causing memory access conflicts.

Edge-based decoders for low-density parity-check codes

In one embodiment, a (hard-drive) read channel has a (DFIR equalization) filter, whose tap coefficients are adaptively updated. A reset controller monitors an (LLR) signal generated downstream of the filter to automatically determine when to reset the filter, e.g., by reloading an initial set of user-specified tap coefficients. For LLR values, the reset controller determines to reset the filter when the reset controller detects that too many recent LLR values have confidence values that are too low. When implemented in a hard-drive read channel, the reset controller can reset the filter one or more times during read operations within a sector of the hard drive.

Automatic filter-reset mechanism

Various embodiments of the present invention provide systems and methods for out of order memory management. For example, a method for out of order data processing is disclosed. The method includes providing an out of order codeword memory circuit that includes a number of codeword memory locations in a codeword memory area and the same number of index values in an index area. Each of the index values corresponds to a respective one of the codeword memory locations. The methods further include receiving a data set; storing the data set to one of the codeword memory locations; receiving an indication that the data set stored in the one of the codeword memory locations has completed processing; and grouping an index value corresponding to the one of the codeword memory locations with one or more other index values corresponding to unused codeword memory locations.

In one embodiment, a signal processing receiver has a branch-metric calibration (BMC) unit that receives (i) sets of four hard-decision bits from a channel detector and (ii) a noise estimate. The BMC unit has two or more update blocks (e.g., tap-weight update and/or bias-compensation blocks) that generate updated parameters used by a branch-metric unit of the channel detector to improve channel detection. The two or more update blocks generate the updated parameters based on (i) the sets of four hard-decision bits, (ii) the noise estimate, and (iii) bandwidth values. The bandwidth values for at least two of the two or more update blocks are selected such that they are different from one another. Selecting different bandwidth values may reduce the bit-error rate for the receiver over the bit-error rate that may be achieved by selecting the bandwidth values to be the same as one another.

Branch-metric calibration using varying bandwidth values

Various approaches to recover data are described. An one example, an encoded data stream is processed in a first channel decoder producing a channel decoder output. The channel decoder output and the encoded data stream are processed in an error compensation unit to compensate the channel decoder output for low frequency noise and produce an error compensated data stream. The error compensated data stream is processed in a second channel decoder to produce a recovered data stream, wherein the recovered data stream has a reduction in the number of errors as compared to the encoded data stream. Systems to iteratively recover data from an encoded data stream are also described.

Growing community of inventors

Longmont, CO, United States of America

Lingyan Sun