Huawei Technologies Co., Limited

Shenzhen Aoto Electronics Co., Ltd.

Zte Corporation

Tencent Technology (Shenzhen) Company Limited

Huawei Digital Power Technologies Co., Ltd.

Ling Liu

Liangchuan Li

Bin Li

Hui Shen

Jiaqi Gu

Zhiyu Xiao

Hanqu Wu

Zhenzhi Wu

Yi Shen

Lei Liu

Yu Zhang

Liang Zhang

Jie Chen

Chen Wang

Ming Ju Chen

Yuanda Huang

Fang Xiao Wang

Liqiang Liu

Changsong Xie

Zhi Yuan

Yecheng Xian

Yang Mo

Jinlong Wang

Xinrong Hu

Weiping Song

Yuan Wei

Wentong Wan

Xuanzhong Li

Mingpu Xie

Zhongshu Zhang

Qingsong Xue

Shengcai Lu

Jialin Peng

Linghai Zeng

Wenyi Wang

Jinming Bi

Xingming Li

Hongbin Yu

Xuegang Ou

Bosheng Lei

Huayu Sun

Ran Jing

Dori Gidron

Doron Cohen

Michael Zarubinsky

Ren Sheng

Rui Ge

Liangchuan Liu

Embodiments of the present disclosure provide a local edge offloading method and system, and an offloading service apparatus and a base station. The local edge offloading method includes: an offloading service receiving user plane bearer information sent from a base station, and establishing an offloading user plane instance according to the user plane bearer information; upon reception of an uplink data service package sent from the base station, the offloading service determining whether there is a corresponding offloading user plane instance for the uplink data service package; and in a case where there is a corresponding offloading user plane instance in the uplink data service package, matching the uplink data service package with an offloading matching rule, and determining to forward the uplink data service package to a core network or a local server.

Local edge offloading method and system, and offloading service apparatus and base station

This application discloses a power supply system, including: A first end of a bus capacitor is connected to a first end of a power supply, and a second end of the bus capacitor is connected to a second end of a semiconductor switch device. A first end of the semiconductor switch device is connected to a second end of the power supply. An input end of a power conversion circuit is connected to the bus capacitor. Two ends of a resistor are respectively connected to the first end and the second end of the semiconductor switch device. When the semiconductor switch device is switched off, the power supply supplies power to the bus capacitor by using the resistor. When a voltage of the bus capacitor is greater than a first preset voltage, an auxiliary power supply is powered on and the semiconductor switch device is switched off.

Power supply system, soft-start circuit, and control method

Embodiments of the present disclosure disclose obtaining to-be-encoded first information that includes first and second information bit sets. The bits included in the first information bit set are obtained through decoding by a plurality of terminal devices. The bits included in the second information bit set are able to be obtained through decoding by some of the plurality of terminal devices. Polar encoding is first performed on the first information bit set to obtain first encoded information. Polar encoding is then performed on the second information bit set based on the first encoded information to obtain second encoded information.

Communication method and apparatus utilizing polar encoding and decoding based on channel capacity

The present disclosure provides example coding method, apparatus, and computer-readable storage medium. One example method includes sorting a plurality of pieces of run-length encoding (RLE) data based on their distribution probabilities. The plurality of pieces of sorted RLE data are mapped onto a plurality of pieces of reassembled data. The plurality of pieces of reassembled data are expanded into a plurality of pieces of binary data. A first matrix is generated based on the plurality of pieces of binary data. A code sequence is determined by processing a source signal, where the code sequence comprises a first set and a second set. A first vector is decoded to output a third set, where the third set includes one or more bits reserved after processing the source signal and one or more locations at which a decoding error occurs in one or more bits discarded after processing the source signal.

Coding method and related device

The present disclosure provides example method for sending a signal in optical communication, an example optical transmitter, and an example optical communication system. One example method for sending a signal in optical communication includes generating, by an optical transmitter, multiple first subcarriers based on a bit stream. State of polarization (SOP) rotation is performed by the optical transmitter on at least one subcarrier in the multiple first subcarriers to generate multiple second subcarriers, wherein the multiple second subcarriers comprise multiple subcarriers each with a relative SOP rotation angle, and the relative SOP rotation angle is not zero and is not an integer multiple of 90 degrees. The multiple second subcarriers are modulated to an optical signal. The modulated optical signal is sent by the optical transmitter.

Method for receiving and sending signal in optical communication, optical transceiver, and system

The disclosure provides image encoding methods and apparatuses. One example encoding method includes: obtaining a one-dimensional sequence of quantized coefficients of an image; obtaining a run-length value sequence and a level value sequence based on the one-dimensional sequence of the quantized coefficients; obtaining an updated second distribution probability of each level value in the level value sequence based on the m first distribution probabilities, the n second distribution probabilities, and a preset mapping rule; and performing encoding based on the level value sequence and the updated second distribution probability of each level value in the level value sequence to obtain and output encoded image data.

Image encoding method and apparatus, image decoding method and apparatus, and chip

A method and an apparatus for encoding a polar code concatenated with a cyclic redundancy check (CRC), where M bits are selected from K bits in the sequence to perform CRC encoding. The M bits are determined based on reliability of K polarized subchannels on which the K bits are placed and/or row weights of K rows, in a first matrix, corresponding to the K polarized subchannels on which the K bits are placed. The first matrix is an encoding matrix of polar encoding. Polar encoding is performed on the K bits and obtained CRC check bits. An encoded codeword is output.

Method and apparatus for encoding polar code concatenated with CRC code

A data processing method includes performing first equalization processing on a data stream that comprises a plurality of sub-data stream segments, performing segment de-interleaving on the data stream, separately performing first forward error correction (FEC) decoding on each sub-data stream segment in a data stream, performing, according to an equalization termination state of each sub-data stream segment, second equalization processing on each sub-data stream segment, performing second FEC decoding on the data stream, and outputting the data stream obtained according to the second FEC decoding in response to a preset iteration termination condition being met, or performing, in response to the preset iteration termination condition not being met, according to the equalization termination state of each sub-data stream segment obtained according to the first equalization, the second equalization processing on each sub-data stream segment obtained according to the second FEC decoding.

Data processing method and apparatus

The present disclosure relates to an apparatus and method of processing a digital signal, wherein an input signal is transformed into the frequency domain by applying a fast Fourier transformation (FFT) processing to obtain a transformed input signal. Positive and negative frequency components of the transformed input signal are separated and respective ones of the separated positive and negative frequency components are separately processed by respective digital filtering to obtain filtered frequency components. The filtered frequency components are combined in the frequency domain using a down-sampling operation for down-sampling the filtered frequency components from an input number of samples per symbol to a different output number of samples per symbol, and the combined output components are converted into the time domain by applying an IFFT processing.

Apparatus and method for processing a digital signal in a frequency domain linear equalizer

Embodiments of this application disclose an interaction information obtaining method performed at a target user terminal. After detecting, on a virtual map preset in an interaction application, a trigger operation performed on a target POI identifier, the target user terminal obtains first location information of the target user terminal by using the virtual map and second location information corresponding to the target POI identifier on the virtual map. The target user terminal detects a distance difference between the first location information and the second location information. When the distance difference satisfies a preset distance range, the target user terminal sends, to an interaction server, an interaction information request carrying the target POI identifier and receives interaction information corresponding to the target POI identifier from the interaction server and then displays the interaction information on the virtual map.

Interaction information obtaining method, interaction information setting method, user terminal, system, and storage medium

An embodiment method includes: performing balancing processing on a data stream that includes a plurality of sub-data stream segments, and performing segment de-interleaving on a data stream obtained after the balancing processing. The method further includes separately performing forward error correction (FEC) decoding on each sub-data stream segment in a data stream obtained after the segment de-interleaving. The method further includes performing, according to a balancing termination state of each sub-data stream segment obtained after previous balancing processing, balancing processing on each sub-data stream segment obtained after the FEC decoding, and performing FEC decoding on the data stream obtained after balancing processing is performed on each sub-data stream segment. When it is determined that a preset iteration termination condition is met, the method includes outputting the data stream obtained after the FEC decoding.

A signal processing system and method, and an apparatus are provided. A phase recovery apparatus may be used to: receive a feedback signal fed back by an information iteration apparatus, perform, based on the feedback signal, phase recovery on a signal output by an equalizer, and output a phase-recovered signal to a post filtering apparatus, so that the post filtering apparatus performs noise filtering on the phase-recovered signal, and outputs a noise-filtered signal to the information iteration apparatus. To be specific, the phase recovery may be performed, based on the signal fed back by the information iteration apparatus, on the signal output by the equalizer. Because output of the information iteration apparatus is more accurate in determining the signal, precision of the phase recovery can be improved, cycle skipping is reduced, and input signal quality of the post filtering apparatus is improved.

Signal processing system and method, and apparatus

Embodiments of this application provide a method for obtaining a phase detection signal in a clock recovery circuit and a phase detector, configured to obtain a correct phase detection signal. A phase detector obtains sampling sequences sent by an analog to digital converter ADC, where the sampling sequences are obtained by the ADC by sampling, an electrical signal received by the ADC, and the electrical signal carries a pre-configured training sequence; the phase detector calculates a correlation between the sampling sequences and a comparison sequence, to determine a first location and a second location, where the first location and the second location are locations of a starting point of the training sequence in the sampling sequences; and the phase detector obtains a phase detection signal based on a difference parameter of the first location and the second location.

Method for obtaining phase detection signal in clock recovery circuit and phase detector

A method for sending and receiving a signal is disclosed, and a corresponding device and system. The method includes performing constellation mapping on a data stream to obtain a mapped signal, and performing pre-filtering on the mapped signal to convert the mapped signal into a narrowband signal filtered signal. The pre-filtering is finite impulse response filtering. A bandwidth of the narrowband signal filtered signal is less than bandwidth of the mapped signal, and the narrowband signal filtered signal is a baud rate signal. The method also includes performing waveform forming according to the narrowband signal filtered signal to obtain a shaped signal, and performing digital-to-analog conversion on the shaped signal to convert a shaped second signal into an analog signal, and sending the analog signal.

Method for sending and receiving signal, and corresponding device and system

Embodiments of the present invention provide a signal receiving method and a receiver. The signal receiving method includes: sequentially preprocessing a received first signal to obtain to-be-processed second signals; generating filtering coefficients for the second signals by converting colored noise of the second signals into white noise; and filtering the corresponding second signals according to the filtering coefficients. Filtering can be performed according to different channel conditions and transmission requirements, thereby improving system performance of the receiver.

Signal receiving method and receiver

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Shenzhen, China

Ling Liu