Lsi Logic Corporation

Agere Systems Inc.

Ciranova, Inc.

Lindor Eric Henrickson

Sheldon Aronowitz

Edwin Simon Petrus

Paul Neary

Exemplary systems and methods of laying out integrated circuits are disclosed. The systems include a layout application configured to place geometries in conformance with layout constraints transformed into composite cells. A composite cell defines a relationship between one or more cells, such as parameterized cells, and is independent of the physical topology of the cells. The exemplary systems are configured to use the composite cells to restrict a number of possible layout scenarios by generating a first layout scenario in conformance with the composite cell implementations, and to thereafter generate a second layout scenario in conformance with the constraints on all cells within the first layout scenario. Embodiments of the present invention are particularly suited to the layout of analog and mixed signal integrated circuits resulting in faster, more flexible, and more efficient layout as compared with conventional techniques which require the layout application to search through a much broader set of possible scenarios.

System and method for utilizing meta-cells

A circuit and method for generating a local clock signal and a telecommunications system incorporating the circuit or the method. In one embodiment, the circuit includes: (1) a phase detector for receiving an input data signal, (2) (at least) first and second continuously controllable delay lines, coupled to the phase detector, for producing respective first and second candidate local clock signals and (3) delay line selector, coupled to the first and second delay lines, for selecting one of the first and second candidate local clock signals to be the local clock signal based on phase excursions in the input data signal.

Circuit and method for generating a local clock signal

A MOSFET having a buried channel structure and an adjacent surface channel structure between a source region and a drain region. The surface channel structure is preferably formed adjacent the source region via angular implantation techniques. By combining the advantages of the surface channel device with the buried channel device, the resulting hybrid MOSFET structure has improved drive current and switching characteristics.

Hybrid surface/buried-channel MOSFET

The present invention comprises a method for controlling a threshold voltage through a semiconductor substrate of a first conductivity type (the type being an n- or p- type in a MOSFET) without the need for a blanket implant for either long or short channel devices. A gate structure having opposed lateral edges is formed adjacent a surface of the semiconductor substrate and over a channel region of the substrate. The substrate is rotated around a rotation axis normal to the surface of the substrate to a first rotation position. Ions of a first conductivity type are then implanted into the channel region, using the gate structure as a mask, at an oblique angle relative to the surface normal of the substrate. The substrate is then rotated to a second rotation position approximately 180 degrees from the first rotation position. Ions of the first conductivity type are then implanted into the channel region, using the gate structure as a mask, at the oblique angle relative to the surface of the substrate.

Growing community of inventors

San Jose, CA, United States of America

Lindor Eric Henrickson