Micron Technology Incorporated

Photobit Corporation

Lin Ping Ang

Sandor L Barna

Steve Huang

Alexander I Krymski

Ali Enayat Zadeh

Systems and techniques to readout array-based analog data with reduced power requirements and reduced fixed pattern noise. An image sensor on an integrated circuit may include a sensor array to provide array-based analog data, a parallel sampling circuitry to receive the array-based analog data in parallel, a pipelined amplification circuitry to serially amplify the received array-based analog data, and an analog-to-digital converter to convert the amplified array-based analog data into digital data.

Readout of array-based analog data in semiconductor-based devices

A pipelined analog-to-digital converter features an amplifier block that includes a switching network to implement a double sampling and double conversion principle of operation. The amplifier block utilizes both phases of a clock for sampling and conversion. Additionally, each stage of the analog-to-digital converter is associated with two independent processing blocks. The analog-to-digital converter can achieve double throughput for approximately the same level of power consumption. Alternatively, throughput may be maintained, but the gain-bandwidth of the amplifier block may be reduced by half, thereby halving the DC bias current consumed by the amplifier. Additionally, the output signal of the amplifier itself is not reset to a common mode voltage.

Double throughput analog to digital converter

A CMOS active pixel color linear image sensor is operable in line-packed readout mode, and at very high speed. In accordance with a preferred embodiment, the sensor is formed entirely on a single-chip and may be further configurable for operation in parallel-packed and/or pixel-packed modes. Line-packed pixel readout is accomplished by spreading same color pixel signal sampled values in storage elements across each of plural readout register arrays in a &ldquo;cyclic&rdquo; manner. Facility is introduced for starting the reading of a next pixel (e.g., R pixel ) even before the previous pixel (R pixel ) has been read out to increase the effective pixel readout rate.

Active pixel color linear sensor with line-packed pixel readout

A sampling and readout system including a cascaded stage charge amplifier samples, amplifies, and outputs pixel sensor data from an array of pixel sensors. The charge amplifier divides the gain into several gain stages. Each gain stage amplifies the pixel sensor data.

Using cascaded gain stages for high-gain and high-speed readout of pixel sensor data

Active pixel color linear sensor with line&mdash;packed pixel readout

Smarts are added to a CMOS active pixel color linear image sensor operable in any of parallel-packed, pixel-packed, and line-packed readout mode, to provide the added feature of variable imaging resolution operability. By combining decoder block functionality with shift selection logic to provide column selection adaptable for lowering the resolution of an imaging process, higher speed imaging is possible. Furthermore, the added functionality is implemented in a manner which does not unduly impact chip size. More importantly, the added functionality is compatible with, and in fact complements the specific architecture of an active pixel color linear sensor with variable readout mode functionality incorporated therein.

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Pasadena, CA, United States of America

Lin Ping Ang