Huawei Digital Power Technologies Co., Ltd.

Shanghaitech University

Shanghai Quicktron Intelligent Technology Co., Ltd

Alcatel Lucent

Ali Corporation

Li, Lin

Lin Li

Zhiwu Xu

Haibin Guo

Yajun Ha

Huan Zhao

Hao Wu

Kai Xin

Fei Xu

Rui Li

Zhipeng Wu

Xinyu Yu

Wenlin Zhang

Fei Ni

Hualei Ju

Qinwei Liu

Haijun Luo

Liuliu Huang

Yuanzheng Cao

Mingwei Xu

Yijun Xu

This application provides a photovoltaic system and a power supply current control method thereof. The photovoltaic system includes a direct current bus and at least two power supply units connected in parallel to the direct current bus. The power supply current control method of a photovoltaic system includes: obtaining a current power supply state parameter of each of the at least two power supply units, determining a reference power supply current value of each power supply unit based on the current power supply state parameter of each power supply unit, and adjusting a current supply power of each power supply unit based on the reference power supply current value of each power supply unit. According to this application, appropriate load distribution between power supply units can be ensured, and applicability is high.

Photovoltaic system and power supply current control method thereof

A graphics processing unit (GPU)-based logic rewriting acceleration method comprising parallelizing sub-procedures of And-Inverter Graph (AIG)-based logic rewriting. A recursive sub-procedure of the AIG-based logic rewriting is redesigned to be non-recursive, to provide sufficient parallelism for a GPU. In order to parallelize a replacement step on the GPU, the present disclosure uses a lock to ensure mutually exclusive access, which inevitably damages scalability of inter-node parallelism. In order to fully utilize the inter-node parallelism on a large scale, the present disclosure proposes a work scheduler that adds nodes with non-overlapping maximum fan-out-free cones (MFFCs) to a group, such that nodes in an MFFC can be deleted simultaneously without a conflict. In order to simultaneously create and delete a same node, the present disclosure also proposes a GPU-friendly graphical data structure to support these concurrent operations.

Graphics processing unit (GPU)-based logic rewriting acceleration method

A power conversion module includes a power transistor and a sampling control unit. The sampling control unit determines a given duty cycle of the power conversion module based on the bus reference duty cycle, the power supply reference duty cycle, and the current limiting reference duty cycle, and controls, based on the given duty cycle, the power transistor to work, to control the direct current bus to have a target bus voltage and enable the power conversion module to run at the maximum power point. In this application, the direct current bus can be stabilized and the power conversion module can be controlled to run at the maximum power point.

Power conversion module and power supply system

N direct current coupling units are configured to provide electric energy to a load. Each of the N direct current coupling units includes an energy storage unit. The energy storage unit is configured to store electric energy or supply power to the load. Herein, N is a positive integer. A primary controller is configured to determine an expected discharge power value of energy storage units in the N direct current coupling units, where the expected discharge power value is a power value that indicates power that needs to be discharged by the energy storage units in the N direct current coupling units, and determine actual discharge power of the energy storage unit in each direct current coupling unit based on the expected discharge power value and first characteristic information of the energy storage unit in the direct current coupling unit.

Power system and control method for power system

Any one of a plurality of to-be-grouped devices in a power supply system reports an initial bus voltage to a topology detection device; and reports a current bus voltage after delivering a bus voltage adjustment instruction to a target reference device. The bus voltage adjustment instruction instructs the target reference device to adjust a voltage. The target reference device receives the bus voltage adjustment instruction and adjusts the voltage according to the bus voltage adjustment instruction. The topology detection device obtains the initial bus voltage and the current bus voltage of the plurality of to-be-grouped devices, and determines, based on a difference between the initial bus voltage of the plurality of to-be-grouped devices and the current bus voltage of the plurality of to-be-grouped devices, whether the target reference device and a target to-be-grouped device are connected to a same bus.

Power supply system and topology detection method

An energy storage system is provided, where the energy storage system may include an energy storage module and a power conversion module. The energy storage module may be configured to generate a target waveform signal on the direct current bus when receiving a black start signal. In this case, the power conversion module may be configured to: detect the target waveform signal on the direct current bus, and turn on based on the target waveform signal. When the power conversion module cannot receive a power-on instruction of an energy management system, the power conversion module may also actively turn on when detecting the target waveform signal on the direct current bus, to implement a black startup. This features low costs and higher applicability.

Energy storage system

A system for controlling a direct current bus voltage includes a controller and an inverter. The controller is configured to: obtain a power grid voltage; obtain a maximum sampling value of a direct current bus voltage of the inverter when the power grid voltage jumps, where the maximum sampling value of the direct current bus voltage is a maximum voltage value on the direct current bus in a time period for detecting a power grid voltage jump; obtain a first direct current bus voltage reference value based on the maximum sampling value of the direct current bus voltage; and obtain a second direct current bus voltage reference value based on the first direct current bus voltage reference value and a preset first rising gradient value, to limit a rising rate of the direct current bus voltage.

System and method for controlling direct current bus voltage

Example three-level inverters, control methods, and systems are provided. One example three-level inverter includes a first bus capacitor, a second bus capacitor, a power conversion circuit, and a controller. The first bus capacitor is connected in the middle of the current bus and the power conversion circuit. The power conversion circuit is configured to convert a direct current into a three-phase alternating current for output. The controller is configured to determine a balance reference by using a difference between absolute values of voltages of the positive and negative direct current buses and an even harmonic current in a grid-connected current, where the balance reference is used to enable the three-level inverter to generate a current signal for balancing the voltages of the positive and negative direct current buses.

Three-level inverter, control method, and system

A method for implementing formal verification of an optimized multiplier via symbolic computer algebra (SCA)-satisfiability (SAT) synergy includes: systematically recovering, by a reverse engineering algorithm, an adder tree from an optimized multiplier; 2) generating, by a constraint satisfaction algorithm, a reference multiplier only by using an adder based on a constraint condition; and 3) combining, by an SCA-based and SAT-based verification method, complementary advantages of SCA and SAT. In the verification framework, the method introduces a reference multiplier generator for generating a correct reference multiplier. The correct reference multiplier has both a structure similar to a structure of the optimized multiplier and a clear adder boundary. The clear adder boundary allows proving correctness of the correct reference multiplier through SCA-based verification. With a structural similarity between the reference multiplier and the optimized multiplier, the reference multiplier is used as a known correct model for SAT-based verification of the optimized multiplier.

Method for implementing formal verification of optimized multiplier via SCA-SAT synergy

A converter system includes a plurality of converters, a sampling circuit, and a control circuit. The plurality of converters are connected in parallel. Each converter includes a detection circuit which includes a first switch and at least two resistors. The first switch is connected in parallel with one of the at least two resistors. The control circuit control the sampling circuit to collect a first voltage and a second voltage, where the first voltage is a voltage that is between a second bus and a ground cable and that is collected by the sampling circuit when first switches in detection circuits of a first quantity are in a turn-on state, the second voltage is a voltage that is between the second bus and the ground cable and that is collected by the sampling circuit when first switches in detection circuits of a second quantity are in a turn-on state.

Converter system, method and apparatus for detecting insulation resistance of system, and medium

Transfer robot

A three-level converter includes a high-voltage side unit, a low-voltage side unit, a flying capacitor, a first switch to a fourth switch, and a control unit. When a voltage of the flying capacitor falls outside a safe target voltage range, the control unit may control the third switch and the fourth switch to be normally open, and control, based on the voltage of the flying capacitor and a voltage of the low-voltage side unit, each of the first switch and the second switch to be turned on or off, so that the voltage of the flying capacitor falls within the target voltage range. Alternatively, the control unit may control the first switch and the second switch to be normally open, and control, based on the voltage of the flying capacitor and a voltage of the low-voltage side unit.

Three-level converter, control method thereof, and power supply system

A voltage source inverter includes a bus capacitor, a bidirectional power tube, a filter inductor, and a filter capacitor. A voltage control method includes: respectively obtaining a first feedback current and a first feedback voltage from an output end of the filter inductor and an output end of the filter capacitor; obtaining a first duty cycle and a second duty cycle based on the first feedback current, a maximum current reference value, and a minimum current reference value in a current loop; obtaining a third duty cycle based on the first feedback voltage and a voltage reference value in a voltage loop; and selecting one of the first duty cycle, the second duty cycle, and the third duty cycle, and controlling the bidirectional power tube, so that a duty cycle of the bidirectional power tube is between the first duty cycle and the second duty cycle.

Growing community of inventors

Shanghai, China

Lin Li