Western Digital Technologies, Inc.

Lin Hui Chen

Chien Te Chen

Yu Ying Tan

Songtao Lu

Chia-Hsuan Huang

T Sharanya Kaminda

Ching Chuan Hsieh

Huang Pao Yi

Devices and methods are described for reducing etching due to Galvanic Effect within a printed circuit board (PCB) that may be used in an electronic device. Specifically, a contact trace is coupled to a contact finger that has a substantially larger surface area than the contact trace. The contact finger is configured to couple the electronic device to a host device. The contact trace is electrically isolated from the rest of the PCB circuitry during a fabrication process by a separation distance between an exposed portion of the contact trace and an impedance trace. The contact finger and the exposed portion of the contact trace are plated with a common material to reduce galvanic etching of the contact trace during fabrication. The contact trace is then connected to the impedance trace using a solder joint.

Printed circuit board for galvanic effect reduction

Growing community of inventors

Taichung, Taiwan

Lin Hui Chen