Industrial Technology Research Institute

Lin-Chieh Chen

Hen-Wai Tsao

Chun-Yu Chao

Miin-Hwa Jiang

Cheng-Sheng Han

A triggerable, pipelined 40-bit high speed accumulator includes trigger and continuous modes which can be operated at 50 MHz clock frequency. The high speed accumulator can be combined with static random access memory (SRAM) so as to be applied to digital frequency synthesizer, function generator and arbitrary waveform generator, etc. The high speed accumulator has two operation modes-trigger mode and continuous mode. Under trigger mode, the accumulator waits for a trigger signal to initiate its operation, while under continuous mode, the accumulator works without any trigger signal.

50 MHz 40-bit accumulator with trigger capability

A differential mode time to digital converter uses a pair of symmetric capacitors and a pair of constant currents to generate two charging curves with the same characteristics. By charging the capacitors at different timings to produce a voltage difference between the capacitors, and then holding and amplifying the voltage difference, a relationship between time and the digital signal is obtained, thereby reducing the effects of temperature on the electronic element and providing a high noise immunity, short conversion time, and high linearity.

Growing community of inventors

Taipei, Taiwan

Lin-Chieh Chen