International Business Machines Corporation

Lijuan Zou

Kangguo Cheng

Zhenxing Bi

Yi Song

Chih-Chao Yang

Su Chen Fan

Yann Mignot

Ashim Dutta

John Christopher Arnold

Jing Guo

Techniques for area scaling of contacts in VTFET devices are provided. In one aspect, a VTFET device includes: a fin(s); a bottom source/drain region at a base of the fin(s); a gate stack alongside the fin(s); a top source/drain region present at a top of the fin(s); a bottom source/drain contact to the bottom source/drain region; and a gate contact to the gate stack, wherein the bottom source drain and gate contacts each includes a top portion having a width W1over a bottom portion having a width W2, wherein W2<W1, and wherein a sidewall along the top portion is discontinuous with a sidewall along the bottom portion. The bottom portion having the width W2is present alongside the gate stack and the top source/drain region. A method of forming a VTFET device is also provided.

Area scaling for VTFET contacts

Semiconductor devices and methods of forming the same include forming slanted dielectric structures from a first dielectric material on a substrate, with gaps between adjacent slanted dielectric structures. A first semiconductor layer is grown from the substrate, using a first semiconductor material, including a lower portion that fills the gaps and an upper portion above the first dielectric material. The lower portion of the first semiconductor layer is replaced with additional dielectric material.

Nanosheet transistor bottom isolation

Controlled IBE techniques for MRAM stack patterning are provided. In one aspect, a method of forming an MRAM device includes: patterning an MRAM stack disposed on a dielectric into individual memory cells using IBE landing on the dielectric while dynamically adjusting an etch time to compensate for variations in a thickness of the MRAM stack, wherein each of the memory cells includes a bottom electrode, an MTJ, and a top electrode; removing foot flares from the bottom electrode of the memory cells which are created during the patterning of the MRAM stack; removing residue from sidewalls of the memory cells which includes metal redeposited during the patterning of the MRAM stack and during the removing of the foot flares; and covering the memory cells in a dielectric encapsulant. An MRAM device is also provided.

MRAM device formation with controlled ion beam etch of MTJ

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Slingerlands, NY, United States of America

Lijuan Zou