International Business Machines Corporation

Lijuan Huang

Jack Oon Chu

Hon-Sum Philip Wong

David R DiMilia

Kevin K Chan

Paul Michael Solomon

John Albrecht Ott

Donald Francis Canaperi

Fenton Read McFeely

Guy M Cohen

Michael F Lofaro

Christopher Peter D'Emic

John Albert Ott

A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial SiGelayers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly selective etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed SiGe, and strained SiGedepending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained SiGeC or a heavily doped layer to make electrical contacts for the SiGe/Si heterojunction diodes.

Layer transfer of low defect SiGe using an etch-back process

A method (and resultant structure) of forming a semiconductor device, includes forming a metal-back-gate over a substrate and a metal back-gate, forming a passivation layer on the metal back-gate to prevent the metal back-gate from reacting with radical species, and providing an intermediate gluing layer between the substrate and the metal back-gate to enhance adhesion.

Method for manufacturing device substrate with metal back-gate and structure formed thereby

A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial SiGelayers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly seletive etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed SiGe, and strained SiGedepending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained SiGeC or a heavily doped layer to make electrical contacts of the SiGe/Si heterojunction diodes.

A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) is described incorporating growing epitaxial Si Ge layers on a semiconductor substrate, implanting hydrogen into a selected Si Ge layer to form a hydrogen-rich defective layer, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and separating two substrates at the hydrogen-rich defective layer. The separated substrates may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si Ge , and strained Si Ge depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si Ge C.

Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique

A method and apparatus is described incorporating a semiconductor substrate, a CMP tool, a brush cleaning tool, and a chemical wafer cleaning tool. The CMP is performed with a down force of 1 psi, a backside air pressure of 0.5 psi, a platen speed of 50 rpm, a crarrier speed of 30 rpm and a slurry flow rate of 140 milliliters per minute.

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Tarrytown, NY, United States of America

Lijuan Huang