Zte Corporation

Sanechips Technology Co., Ltd.

Zte Microelectronics Technology Co., Ltd

Liguo Feng

Hao Sun

Xu Chen

Dewei Chen

Linsheng Zhang

Fei Zou

Sihua Hong

Hongbo Xu

A method for achieving high-speed data transmission is disclosed. The method includes: repacking a data packet to be transmitted using a preset bit width and adding a check code; for a correct response message, releasing system resources immediately, and for an incorrect response message, implementing an automatic retransmission operation on the data packet, thereby reducing the complexity and power consumption level of a chip, and ensuring the data exchange speed and quality. Also provided is a universal interface chip for achieving high-speed data transmission.

Method and universal interface chip for achieving high-speed data transmission

Method and apparatus for decoding is provided. A decoding channel IDentity (ID) of a Dedicated Physical Control Channel (DPCCH) and a decoding channel ID of an Enhanced DPCCH (E-DPCCH) of a user are acquired according to a user ID of the user; Transport Format Combination Indicator (TFCI) symbols in the DPCCH and Enhanced TFCI (E-TFCI) symbols in the E-DPCCH are de-mapped, and the de-mapped symbols are stored according to the decoding channel ID; and a symbol queue to be decoded is selected according to priorities of symbol queues of the DPCCH and the E-DPCCH, symbols corresponding to the selected symbol queue from the de-mapped symbols, and decoding the read symbols are read out.

Decoding method and apparatus

The present invention discloses a method and apparatus for generating a scrambling code, and the method includes: acquiring initial sequences X0, Y0; extending the initial sequences X0, Y0 for (&#x2514;N/M&#x2518;+1) times, and obtaining extended sequences X*, Y*, wherein, the N is a positive integer, 0&#x3c;M&#x2266;22, and '&#x2514; &#x2518;' denotes rounded down; acquiring phase offset column vectors; and generating the scrambling code according to the extended sequences X*, Y* and the phase offset column vectors. The apparatus includes: a first acquiring module, an extension module, a second acquiring module and a generation module. The technical scheme of the present invention can process more users, reduce the processing delay and greatly improve the processing efficiency in the same system clock.

Method and device for generating scrambling code

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Shenzhen, China

Liguo Feng