Leland Stanford Junior University

Sabio Labs, Inc.

Lieven Vandenberghe

Stephen P Boyd

Abbas A El Gamal

Mar Hershenson

Xiling Shen

Sunderarjan Mohan

Dave Colleran

Cesar Crusius

A method and apparatus for parsing signomial and geometric programs, referred to herein as 'the Parser'. Signomial and Geometric programming is a unique class of mathematical problems that is useful in the study of optimization problems. The Parser is a program designed to recognize and parse both signomial and geometric programs such that they may be accepted and solved by signomial and geometric program solvers. The Parser accepts an optimization problem from a user in the form of algebraic expressions. The Parser can then identify the problem as a signomial program and can further determine if it reduces to a geometric program. If either a signomial or geometric program exists, the Parser converts the algebraic expressions to a compact numeric format that can be accepted by a computer-aided solver. In the case of a geometric program, the solver may find a global solution to the optimization problem. However, in the case of signomial program, the solver may only find a local solution. The solution found by the solver is routed back to the Parser which reports it in a user-readable format.

Parser for signomial and geometric programs

A method for optimizing an integrated circuit uses a dominant time constant of a transition of the circuit. A physical layout of the circuit is characterized in terms of design parameters. The circuit is modeled by a conductance matrix G and a capacitance matrix C, wherein G and C are affine functions of the design parameters. The optimization method comprises the step of finding the values of the design parameters that optimize a property of the circuit while simultaneously enforcing a constraint that the dominant time constant must be less than a maximum value t,. Mathematically, the constraint on the dominant time constant can be written: t,G&minus;C&gE;0. The optimization method can be used when the circuit has a non-tree topology. Furthermore, when the design parameters comprise variables that relate to sizes of elements of the circuit, a topology of the circuit is optimized by the optimization method. In some embodiments the circuit is optimized for a plurality of transitions, and in some embodiments the design parameters are subject to design constraints.

Optimization of integrated circuit properties through constraints using a dominant time constant

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Santa Monica, CA, United States of America

Lieven Vandenberghe