Broadcom Corporation

Nokia Corporation

Liangge Xu

Kari Stadius

Jussi Ryynanen

Tapio Ilmari Rapinoja

Ari Vilander

Saska J Lindfors

Risto H S Kaunisto

Jounl Kristian Kaukovuori

A digitally controlled delay device includes at least one delay generating gate device, whose propagation delay is controlled by limiting operating current by means of a tail transistor that is controlled by its gate voltage, a gate control voltage control means for controlling the current limiting transistor gate voltage, and a bank of digitally controlled MOSFET transistors in parallel configuration, and the digital control is adapted to switch the transistors to off and to diode mode connection, current feeding means to feed current through the bank of MOSFET transistors, and the voltage over the bank of parallel transistors is used for gate source control voltage of the tail transistors.

Digitally controlled delay device

An apparatus and method for operating a frequency synthesizer wherein a value of an first control signal associated with a fine frequency feedback loop connected to a signal generator is monitored, and a second control signal associated with a medium or coarse frequency feedback loop connected to the signal generator is adjusted based on the monitoring. The first and second control signals are then output to control the frequency synthesizer.

Operating a frequency synthesizer

Described is an apparatus that includes a frequency source and a plurality of time domain direct digital synthesizers each having an input connected to an output of the frequency source and an output providing an output frequency signal. A particular time domain direct digital synthesizer includes a sigma-delta modulator that functions as a second order multi-stage noise shaping sigma-delta modulator. In one exemplary embodiment sigma-delta modulator outputs provide a unitary-weighted word used to switch certain unit capacitors that comprise part of a delay modulator to produce a time-varying delay having a time-averaged value that directly corresponds to a binary value appearing on a plurality of phase accumulator outputs.

Frequency synthesizer having a plurality of independent output tones

A method includes generating a plurality of reference phases of a reference signal and selecting a sub-phase from each of the plurality of reference phases to form a set of selected sub-phases. In the method selecting operates in response to synchronized outputs of a multi-phase phase accumulator that operates synchronously in accordance with one of the sub-phases of the set of sub-phases, and where the outputs of the multi-phase phase accumulator may be synchronized using at least one additional sub-phase.

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Espoo, Finland

Liangge Xu