Sifotonics Technologies Co., Ltd.

Boe Technology Group Co., Ltd.

K-tronics (suzhou) Technology Co., Ltd.

Liangbo Wang

Dong Pan

Mengyuan Huang

Ching-yin Hong

Wang Chen

Pengfei Cai

Su Li

Tuo Shi

Guangning Hao

Nai Zhang

Xiaojin Li

Tzung I Su

The present disclosure provides a backplane, a frame structure and a display device. The backplane provided in the present disclosure is secured to a middle frame in a display panel to form a frame structure of the display panel, the backplane including: a bottom plate and a skirt connected to edges of the bottom plate, wherein at least part of the skirt is provided with a clamping member for securing the backplane to the middle frame, the clamping member is provided with a breakable structure configured to break under an external force for disengaging the clamping member from the skirt so that the backplane is separated from the middle frame.

Backplane, frame structure and display device

The present disclosure provides a backplane, a frame structure and a display device. The backplane provided in the present disclosure is secured to a middle frame in a display panel to form a frame structure of the display panel, the backplane including: a bottom plate and a skirt connected to edges of the bottom plate, wherein at least part of the skirt is provided with a clamping member for securing the backplane to the middle frame, the clamping member is provided with a dismounting structure for disengaging the clamping member from the skirt under an external force so that the backplane is separated from the middle frame.

Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.

Compensated photonic device structure and fabrication method thereof

Avalanche photodiodes (APDs) having at least one top stressor layer disposed on a germanium (Ge) absorption layer are described herein. The top stressor layer can increase the tensile strain of the Ge absorption layer, thus extending the absorption of APDs to longer wavelengths beyond 1550 nm. In one embodiment, the top stressor layer has a four-layer structure, including an amorphous silicon (Si) layer disposed on the Ge absorption layer; a first silicon dioxide (SiO) layer disposed on the amorphous Si layer, a silicon nitride (SiN) layer disposed on the first SiOlayer, and a second SiOlayer disposed on the SiN layer. The Ge absorption layer can be further doped by p-type dopants. The doping concentration of p-type dopants is controlled such that a graded doping profile is formed within the Ge absorption layer to decrease the dark currents in APDs.

High performance GeSi avalanche photodiode operating beyond Ge bandgap limits

Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.

Ge/Si avalanche photodiode with integrated heater and fabrication method thereof

A high-speed germanium on silicon (Ge/Si) avalanche photodiode may include a substrate layer, a bottom contact layer disposed on the substrate layer, a buffer layer disposed on the bottom contact layer, an electric field control layer disposed on the buffer layer, an avalanche layer disposed on the electric field control layer, a charge layer disposed on the avalanche layer, an absorption layer disposed on the charge layer, and a top contact layer disposed on the absorption layer. The electric field contact layer may be configured to control an electric field in the avalanche layer.

High-speed germanium on silicon avalanche photodiode

Various embodiments of a germanium-on-silicon (Ge&#x2014;Si) avalanche photodiode are provided. In one aspect, the Ge&#x2014;Si avalanche photodiode utilizes a silicon carrier-energy-relaxation layer to reduce the energy of holes drifting into absorption layer where the absorption material has lower ionization threshold, thereby suppressing multiplication noise and increasing the gain-bandwidth product of the avalanche photodiode.

Ge&#x2014;Si avalanche photodiode with silicon carrier-energy-relaxation layer and edge electric field buffer region

Various embodiments of a photonic device and fabrication method thereof are described herein. A device may include a substrate, a bottom contact layer, a current confinement layer, an intrinsic layer, an absorption layer, and a top contact layer. The bottom contact layer may be of a first polarity and may be disposed on the substrate. The current confinement layer may be disposed on the bottom contact layer. The intrinsic layer may be disposed on the current confinement layer. The absorption layer may be disposed on the intrinsic layer. The top contact layer may be of a second polarity and may be disposed on the absorption layer. The second polarity is opposite to the first polarity.

Photonic device structure and fabrication method thereof

Ge/Si avalanche photodiode with integrated heater and fabrication thereof

Various embodiments of a germanium-on-silicon (Ge&#x2014;Si) photodiode are provided along with the fabrication method thereof. In one aspect, a Ge&#x2014;Si photodiode includes a doped bottom region at the bottom of a germanium layer, formed by thermal diffusion of donors implanted into a silicon layer. The Ge&#x2014;Si photodiode further includes a doped sidewall region of Ge mesa formed by ion implantation. Thus, the electric field is distributed in the intrinsic region of the Ge&#x2014;Si photodiode where there is low dislocation density. The doped bottom region and sidewall region of the Ge layer prevent electric field from penetrating into the Ge&#x2014;Si interface and Ge mesa sidewall region, where a large amount of dislocations are distributed. This design significantly suppresses dark current.

Ge&#x2014;Si P-I-N photodiode with reduced dark current and fabrication method thereof

Various embodiments of a photonic device and fabrication method thereof are provided. In one aspect, a device includes a substrate, a current confinement layer disposed on the substrate, an absorption layer disposed in the current confinement layer, and an electrical contact layer disposed on the absorption layer. The current confinement layer is doped in a pattern and configured to reduce dark current in the device. The photonic device may be a photodiode or a laser.

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Beijing, China

Liangbo Wang