Taiwan Semiconductor Manufacturing Comp. Ltd.

National Taiwan University

Tsinghua University

Liang-Chor Chung

Chee-Wee Liu

Chih-Lin Wang

Ya-Jui Tsou

Zong-You Luo

Shao-Yu Lin

Yao-Te Huang

Cheng-Yuan Li

Jason Huang

Tsui-Wei Wang

Yuh-Jeen Huang

Chuin-Tih Yeh

A method includes forming bottom conductive lines over a wafer. A first magnetic tunnel junction (MTJ) stack is formed over the bottom conductive lines. Middle conductive lines are formed over the first MTJ stack. A second MTJ stack is formed over the middle conductive lines. Top conductive lines are formed over the second MTJ stack.

Magnetoresistive memory device and manufacturing method thereof

Test pad structures and methods of forming a test pad are described herein. A method for forming a test pad includes forming a device element over a substrate, depositing a dielectric layer over the device element and the substrate, and etching openings in the dielectric layer to a first depth. Once the openings have been formed, a conductive material is deposited in the openings and followed by a chemical mechanical planarization to form a first grid feature and a panel region of the test pad, the first grid feature extending lengthwise from the panel region to a perimeter of the test pad. Once formed, a probe may be used to contact the panel region of the test pad during a wafer acceptance test (WAT) and/or a process control monitoring (PCM) test of the device element.

Semiconductor structure and method of manufacture

The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.

Low resistance interconnect structure for semiconductor device

A method includes forming a memory stack over a substrate. A dielectric layer is deposited to cover the memory stack. An opening is formed in the dielectric layer. The opening does not expose the memory stack. A spin-orbit-torque (SOT) layer is formed in the opening. A free layer is formed over the dielectric layer to interconnect the memory stack and the SOT layer.

Method for manufacturing memory device

A magnetoresistive memory device includes a memory stack, a spin-orbit-torque (SOT) layer, and a free layer. The memory stack includes a pinned layer, a spacer layer over the pinned layer, a reference layer over the spacer layer, and a tunnel barrier layer over the reference layer. The SOT layer has a top surface substantially coplanar with a top surface of the tunnel barrier layer of the memory stack. The free layer interconnects the SOT layer and the tunnel barrier layer.

Memory device

A magnetoresistive memory device includes a plurality of bottom conductive lines, a plurality of top conductive lines, a first memory cell, and a second memory cell. The top conductive lines are over the bottom conductive lines. The first memory cell is between the bottom conductive lines and the top conductive lines and includes a first magnetic tunnel junction (MTJ) stack. The second memory cell is adjacent the first memory cell and between the bottom conductive lines and the top conductive lines. The second memory cell includes a second MTJ stack, and a top surface of the second MTJ stack is higher than a top surface of the first MTJ stack.

A magnetoresistive memory device includes a memory stack, a spin-orbit-torque (SOT) layer, and a free layer. The memory stack includes a pinned layer and a reference layer over the pinned layer. The SOT layer is spaced apart from the memory stack. The free layer is over the memory stack and the SOT layer.

Memory device and manufacturing method thereof

A process for hydrogen production at lower temperature by using Mn/ZnO, Cu/MnO, Cu/CeO, CuCe/ZnO and/or CuMn/ZnO catalysts, wherein a partial oxidization of methanol (POM) process can be initiated at an ambient reactor temperature lower than 100&#xb0; C. and then undertaken at a reaction temperature lower than 200&#xb0; C., and wherein POM process not only generates hydrogen rich gas (HRG) containing 4% CO or less but also generates 1.8 moles hydrogen or more per 1 mole methanol consumed.

Growing community of inventors

Hsinchu, Taiwan

Liang-Chor Chung