International Business Machines Corporation

Liang-Choo Hsia

Louis L Hsu

John Ulrich Knickerbocker

Jon Alfred Casey

Charles Hampton Perry

Sarah Huffsmith Knickerbocker

James N Humenik

Lawrence D David

Srinivasa S Reddy

Robert W Nufer

Ajay Prabhakar Giri

Mark A Takacs

Steven M Kandetzke

John Acocella

Geraldine C Schwartz

Renuka S Divakaruni

George Czornyj

Richard A Bates

Anthony Mastreani

Arnold I Baise

Peter A Agostino

David R Clarke

Daniel P Kirby

Lovell B Wiggins

Salvatore J Scilla

Fernand J Dorleans

Gerald R Larsen

Amy T Matts

Werner E Dunkel

Allen J Dam

Ray M Bryant

Thomas P McAndrew

Fred E Stuebner

The present invention is directed to a unique silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted 'T'. A Cl.sub.2 /O.sub.2 plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl.sub.2 /O.sub.2 reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.

CMOS transistor with two-layer inverse-T tungsten gate

The present invention is directed to a unique method for fabricating a silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted 'T'. A Cl.sub.2 /O.sub.2 plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl.sub.2 /O.sub.2 reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.

Method for fabricating a MOS transistor with two-layer inverse-T

The cracking experienced during thermal cycling of metal:dielectric semiconductor packages results from a mismatch in thermal co-efficients of expansion. The non-hermeticity associated with such cracking can be addressed by backfilling the permeable cracks with a flexible material. Uniform gaps between the metal and dielectric materials can similarly be filled with flexible materials to provide stress relief, bulk compressibility and strength to the package. Furthermore, a permeable, skeletal dielectric can be fabricated as a fired, multilayer structure having sintered metallurgy and subsequently infused with a flexible, temperature-stable material to provide hermeticity and strength.

Process for fabricating a low dielectric composite substrate

The cracking experienced during thermal cycling of metal:dielectric semiconductor packages results from a mismatch in thermal co-efficients of expansion. The non-hermeticity associated with such cracking can be addresssed by backfilling the permeable cracks with a flexible material. Uniform gaps between the metal and dielectric materials can similarly be filled with flexible materials to provide stress relief, bulk compressibility and strength to the package. Furthermore, a permeable, skeletal dielectric can be fabricated as a fired, multilayer structure having sintered metallurgy and subsequently infused with a flexible, temperature-stable material to provide hermeticity and strength.

An elastomeric connector for permanently or temporarily (for testing purposes) connecting area array chips without solder balls or wire bonds comprising an elastomer base material having through-hole conductors deposited therein, and surface conductor tabs which are electrically connected to the through-hole conductors deposited thereon. The surface conductor tabs have an overhanging contact region extending past the periphery of the through-hole conductors. Upon contact between the input/output pads of a chip and the overhanging contact regions of the elastomeric connector when aligned and biased towards each other, a requisite pressure causes a reactionary force by the elastomer base which facilites contact and automatic wipe. The elastomeric connectors may replace solder balls in chip connection applications, or may replace buckling beam test probe heads in chip test applications.

Elastomeric connectors for electronic packaging and testing

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Stormville, NY, United States of America

Liang-Choo Hsia