Taiwan Semiconductor Manufacturing Comp. Ltd.

Scinopharm Taiwan, Ltd.

Food Industry Research and Development Institute

Li-Ting Wang

Teng-Chun Tsai

Cheng-Tung Lin

Huicheng Chang

De-Fang Chen

Huan-Just Lin

Yee-Chia Yeo

Wen-Yen Chen

Tze-Liang Lee

Chien-Hsun Wang

Liang-Yin Chen

Chih-Tang Peng

Huang-Yi Huang

Chi-Yuan Chen

Su-Hao Liu

Hui-Cheng Chang

Hong-Mao Lee

Tai-Chun Huang

Chun-Feng Nieh

Wei-Jung Lin

Hung-Ta Lin

Bing-Hung Chen

Ying-Lang Wang

Yung-Cheng Lu

Ming-Ching Chang

Chun-Hung Lee

Chun-Hsiung Lin

Yu-Chang Lin

Chia-Han Lai

Keh-Chiang Ku

Tz-Shian Chen

Ming-Hsing Tsai

Chien-Hao Chen

Yi-Hung Lin

Kuo-Ju Chen

Chi-Hsuan Ni

Szu-Ying Chen

Mao-Lin Huang

Kuo-Yin Lin

Sen-Hong Syue

Li-Ping Huang

Meng-Ku Chen

Wan-Chun Pan

Ming-Liang Yen

Hsun Chang

Yi-Chao Wang

Syun-Ming Jang Jang

Shih-Chang Chen

Ming-Hua Yu

Pei-Ren Jeng

Pang-Yen Tsai

Jiunn-Ren Hwang

Bo-Cyuan Lu

Chun-I Tsai

Wei-Ting Chien

Chih-Chiang Wang

Jung-Jen Chen

Wan-Chen Hsieh

Yuan-Xiu Liao

Lung-Huang Kuo

Shang-Hong Chen

Wen-Li Shih

Cheng-Jung Sung

Li-Heng Chen

Chih-Hao Wang

Kuo-Cheng Ching

Ching-Wei Tsai

Cheng-Lung Hung

Hou-Yu Chen

Chia-Cheng Chen

Ching-Feng Fu

Wan-Yi Kao

Ming-Chyi Liu

Nai-Han Cheng

Chia-Ling Chan

Chien-Hao Huang

Yen-Lin Chen

Ching-Hong Jiang

Tsai-Yu Huang

Tsung-Cheng Hu

Shih-Chiang Chen

Hing-Yuen Chan

Wen-Tai Lu

Mei-Huei Chen

Kai-Ping Chen

Cary Chia-Chiung Lo

Yi-Yun Li

Hsun-Yin Hsu

Kuan-Hsun Huang

Inze Lin

Chien-Hsun Huang

Yi-Jen Yech

Siao-Jhen Chen

Wenli Lin

Li-Na Huang

Chong-Wai Lo

Li-Lan Wu

Keh-Chiang Kuo

In an embodiment, an apparatus includes a first pyrometer and a second pyrometer configured to monitor thermal radiation from a first point and a second point on a backside of a wafer, respectively, a first heating source in a first region and a second heating source in a second region of an epitaxial growth chamber, respectively, where a first controller adjusts an output of the first heating source and the second heating source based upon the monitored thermal radiation from the first point and the second point, respectively, a third pyrometer and a fourth pyrometer configured to monitor thermal radiation from a third point and a fourth point on a frontside of the wafer, respectively, where a second controller adjusts a flow rate of one or more precursors injected into the epitaxial growth chamber based upon the monitored thermal radiation from the first, second, third, and fourth points.

Apparatus and method for use with a substrate chamber

A method of manufacturing a semiconductor device includes: determining a first reflectivity of a first anneal region on a wafer; determining a second reflectivity of a second anneal region on the wafer, performing a first laser shot on the first anneal region, measuring a first temperature of the first anneal region, and performing a second laser shot on a second anneal region. A power of the first laser shot is set in accordance with the first reflectivity. A power of the second laser shot is set in accordance with the second reflectivity.

Systems, methods, and semiconductor devices

A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.

Trench filling through reflowing filling material

A semiconductor device and a method of forming the same are provided. A method includes forming a fin structure on a substrate. The fin structure includes a plurality of first nanostructures and a plurality of second nanostructures alternately stacked. A dummy gate is formed along sidewalls and a top surface of the fin structure. A portion of the fin structure exposed by the dummy gate is recessed to form a first recess. An epitaxial source/drain region is formed in the first recess. Dopant atoms within the epitaxial source/drain region are driven into the plurality of second nanostructures. The dummy gate and the plurality of first nanostructures are removed. A replacement gate is formed wrapping around the plurality of second nanostructures.

Nanostructure FET and method of forming same

A temperature measuring apparatus for measuring a temperature of a substrate is described. A light emitting source that emits light signals such as laser pulses are applied to the substrate. A detector on the other side of the light emitting source receives the reflected laser pulses. The detector further receives emission signals associated with temperature or energy density that is radiated from the surface of the substrate. The temperature measuring apparatus determines the temperature of the substrate during a thermal process using the received laser pulses and the emission signals. To improve the signal to noise ratio of the reflected laser pulses, a polarizer may be used to polarize the laser pulses to have a S polarization. The angle in which the polarized laser pulses are applied towards the substrate may also be controlled to enhance the signal to noise ratio at the detector's end.

Apparatus, system, and method for measuring the temperature of a substrate

In an embodiment, a method includes forming a plurality of fins adjacent to a substrate, the plurality of fins comprising a first fin, a second fin, and a third fin; forming a first insulation material adjacent to the plurality of fins; reducing a thickness of the first insulation material; after reducing the thickness of the fist insulation material, forming a second insulation material adjacent to the first insulation material and the plurality of fins; and recessing the first insulation material and the second insulation material to form a first shallow trench isolation (STI) region.

Semiconductor device and method of forming same

According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.

Vertical device having a protrusion source

In an embodiment, a device includes: a gate structure on a channel region of a substrate; a gate mask on the gate structure, the gate mask including a first dielectric material and an impurity, a concentration of the impurity in the gate mask decreasing in a direction extending from an upper region of the gate mask to a lower region of the gate mask; a gate spacer on sidewalls of the gate mask and the gate structure, the gate spacer including the first dielectric material and the impurity, a concentration of the impurity in the gate spacer decreasing in a direction extending from an upper region of the gate spacer to a lower region of the gate spacer; and a source/drain region adjoining the gate spacer and the channel region.

Transistor contacts and methods of forming the same

A method of forming a semiconductor device includes removing a light-sensitive material from a workpiece utilizing polarized electromagnetic radiation and annealing features on the workpiece utilizing electromagnetic radiation polarized in a different direction than the polarized electromagnetic radiation utilized to remove the light-sensitive material. In some embodiments, the electromagnetic radiation used to anneal the features on the workpiece is not polarized. In some described embodiments, light-sensitive material removed from the workpiece is exhausted from the chamber in which the light-sensitive removal process is carried out before it can deposit on surfaces of the chamber.

Integrated photoresist removal and laser annealing

In an embodiment, a method includes forming a plurality of fins adjacent to a substrate, the plurality of fins comprising a first fin, a second fin, and a third fin; forming a first insulation material adjacent to the plurality of fins; reducing a thickness of the first insulation material; after reducing the thickness of the first insulation material, forming a second insulation material adjacent to the first insulation material and the plurality of fins; and recessing the first insulation material and the second insulation material to form a first shallow trench isolation (STI) region.

Embodiments disclosed herein relate to using an implantation process and a melting anneal process performed on a nanosecond scale to achieve a high surface concentration (surface pile up) dopant profile and a retrograde dopant profile simultaneously. In an embodiment, a method includes forming a source/drain structure in an active area on a substrate, the source/drain structure including a first region comprising germanium, implanting a first dopant into the first region of the source/drain structure to form an amorphous region in at least the first region of the source/drain structure, implanting a second dopant into the amorphous region containing the first dopant, and heating the source/drain structure to liquidize and convert at least the amorphous region into a crystalline region, the crystalline region containing the first dopant and the second dopant.

Source/drain structure

A method includes forming a gate stack on a first portion of a semiconductor substrate, removing a second portion of the semiconductor substrate on a side of the gate stack to form a recess, growing a semiconductor region starting from the recess, implanting the semiconductor region with an impurity, and performing a melt anneal on the semiconductor region. At least a portion of the semiconductor region is molten during the melt anneal.

Melt anneal source and drain regions

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Hsinchu, Taiwan

Li-Ting Wang