Sandisk Technologies Inc.

Sandisk Enterprise IP LLC

Li Li

James Fitzpatrick

Mark Joseph Dancho

Tatsuya Hinoue

James M Higgins

Yuki Kasai

Mervyn Wongso

James R Tylock

An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack. Annular recesses are formed by laterally recessing the sacrificial material layers around each memory opening. A tubular aluminum oxide spacer is formed at a periphery of each annular recess. A tubular silicon oxycarbide spacer is selectively deposited on each of the tubular aluminum oxide spacers. The tubular silicon oxycarbide spacers are converted into tubular silicon oxide spacers by an oxidation process. Tubular charge storage spacers are formed on inner sidewalls of the tubular silicon oxide spacers. A vertical semiconductor channel is formed over a respective vertical stack of tubular charge storage spacer within each memory opening. The sacrificial material layers are removed to form backside recesses. Electrically conductive material are deposited in the backside recesses to form electrically conductive layers.

Three-dimensional memory device containing tubular blocking dielectric spacers

The various implementations described herein include systems, methods and/or devices used to enable adaptive erasure in a storage device. The method includes performing a plurality of memory operations including read operations and respective erase operations on portions of one or more non-volatile memory devices specified by the read operations and respective erase operations, where the respective erase operations are performed using a first set of erase parameters that has been established as a current set of erase parameters prior to performing the respective erase operations. The method includes, in accordance with each erase operation of at least a subset of the respective erase operations, updating one or more erase statistics that correspond to performance of multiple erase operations. The method includes, in accordance with a comparison of the erase statistics with an erasure performance threshold, establishing a second set of erase parameters as the current set of erase parameters.

Adaptive erase of a storage device

The embodiments described herein methods and devices that enhance the endurance of a non-volatile memory (e.g., flash memory). The method includes obtaining, for each of the plurality of die, an endurance metric. The method also includes sorting the plurality of die into a plurality of die groups based on their corresponding endurance metrics, where each die group includes one or more die and each die group is associated with a range of endurance metrics. In response to a write command specifying a set of write data, the method further includes writing the write data to the non-volatile memory by writing in parallel subsets of the write data to the one or more die assigned to a single die group of the plurality of die groups.

Device and method for managing die groups

Systems, methods and/or devices are used to adapt a target charge to equalize bit errors across page types for a storage medium, such as flash memory, in a storage system. In one aspect, the method includes performing a sequence of operations, including: (1) determining a first target charge, a second target charge, and a third target charge, the first, second, and third target charges used for controlling first, second, and third charge distributions, respectively, in cells of the storage medium when data is written to the cells, wherein the second charge distribution is between the first charge distribution and the third charge distribution, (2) determining a first error indicator for lower/fast pages of the storage medium, (3) determining a second error indicator for upper/slow pages of the storage medium, and (4) adjusting the second target charge in accordance with the first error indicator and the second error indicator.

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Wellesley, MA, United States of America

Li Li