Intel Corporation

Li Len Lim

Mikal Hunsaker

Su Wei Lim

Poh Thiam Teoh

Hooi Kar Loo

Siang Lin Tan

Ming Chew Lee

Shashitheren Kerisnan

Ngeok Kuan Wai

Gim Chong Lee

Aspects of the embodiments are directed to systems, methods, and apparatuses for controlling power management states using a clock request message across a 3.3 volt GPIO pin. Systems can include a CPU root port to transmit to a platform controller hub (PCH) compliant with a PCIe protocol, a first clock request message, the first clock request message comprising a first bit set to assert a clock request transmit (CLKREQ TX assert) on a 3.3 volt general purpose input/output (GPIO) pin local to the PCH; detect that a connected device is entering into a power management state; and transmit, from the CPU root port, to the PCH, a second clock request message, the second clock request message comprising the first bit set to deassert the clock request transmit (CLKREQ TX deassert) and a second bit to assert a clock request protocol (CLKREQ#) on a 3.3 volt GPIO pin.

Method, apparatus, and system for power management on a CPU die via clock request messaging protocol

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Johor, Malaysia

Li Len Lim