Tatung Company

Li-Kai Chang

Fu-Chiung Cheng

Shu-Ming Chang

Ping-Yun Wang

Chin-Tai Chou

Chieh-Ju Wang

Nian-Zhi Huang

Jian-Yi Chen

Chi-Huam Shieh

An HCG to HDL translation method, which can automatically generate VHDL codes. The method reads a hardware component graph (HCG) to find a start node and obtain a corresponding hardware component subgraph of the start node, analyzes all information of the start node to thereby add input and output components and generate a VHDL entity, determines types on all nodes of the hardware component, graph to thereby generate corresponding VHDL components and write associated information in a VHDL architecture, generates corresponding signal connections of VHDL components in accordance with edges of the hardware component graph, and outputs the VHDL entity and architecture to a file in a text form.

Hardware component graph to hardware description language translation method

A method of automatic synthesis of sequential quantum Boolean circuits for transferring a self-timed circuit into a sequential quantum Boolean circuit and synthesizing the sequential quantum Boolean circuit, which comprises the steps of: (A) transferring the self-timed circuit into a state graph having M state nodes, where M is an integer; (B) determining whether the state graph is reversible; (C) encoding the M state nodes by using a unique state encoding when step (B) decides that the state graph is reversible, and producing a unique state coding reversible state graph; (D) transferring the unique state coding reversible state graph (USCRSG) into a corresponding self-timed transformation graph; (E) performing a state decomposition on the self-timed transformation graph and producing a decomposed self-timed transformation graph; and (F) constructing a quantum Boolean circuit of the decomposed self-timed transformation graph.

Method of automatic synthesis of sequential quantum Boolean circuits

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Taipei, Taiwan

Li-Kai Chang