Taiwan Semiconductor Manufacturing Comp. Ltd.

Global Unichip Corporation

Li-Hua Lin

Yu-Yu Lin

Chin-Sung Lin

Ting-Hao Wang

Igor Elkanovich

Ting-Hsu Chien

Pei Yu

Jia-Liang Chen

Tsai-Ming Yang

Yen-Chung Tony Chen

Amnon Parnass

Chia-Hsiang Chang

Yuan-Hung Lin

Yu-Ju Chang

Ting-Chin Cho

Chung-Kai Wang

Li-Ya Tseng

Chao-Ching Huang

Yen-Wei Chen

Zanyu Yang

Chun-Hsu Chen

An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180&#xb0; with respect to a row direction and a column direction.

Interface of integrated circuit die and method for arranging interface thereof

In accordance with an embodiment, a method comprises providing a substrate having a conductive material thereon, forming a ground plane, a first trace rail, and a first perpendicular trace from the conductive material, and forming an insulator material over the ground plane, the first trace rail, and the first perpendicular trace. The ground plane is between the first trace rail and an area of the substrate over which will be a die. The first trace rail extends along a first outer edge of the ground plane, and the first perpendicular trace is coupled to the first trace rail and extends perpendicularly from the first trace rail.

Method of forming a package substrate

In accordance with an embodiment, a substrate layout comprises a ground plane of a first power loop on a layer of a substrate, a first trace rail on the layer extending along a first periphery of the ground plane, and a first perpendicular trace coupled to the first trace rail. The ground plane is between the first trace rail and a die area, and the first perpendicular trace extends perpendicularly from the first trace rail. The first trace rail and the first perpendicular trace are components of a second power loop.

Package substrate

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Kaohsiung, Taiwan

Li-Hua Lin