Asustek Computer Inc.

Li-Chien Wu

Pai-Ching Huang

Yi-Chun Tsai

Ji-Kuang Tan

Tsung-Fu Hung

Yung-Lun Lin

An electronic device with a plurality of booting modes comprises at least a button unit, a control module, a control chip unit, a super I/O unit and a Basic Input/Output System (BIOS). One of the button units outputs a first signal according to a trigger event. The control module includes a buffer unit connected to the button units. The control module sets the buffer unit according to the first signal. The control module outputs a status signal and copies the first signal and outputs the first signal after a delay time. The control chip unit receives the status signal. The super I/O unit receives the first signal outputted from the control module and transmits the first signal to the control chip unit. When the control chip unit receives the status signal and the first signal, the BIOS executes the corresponding booting procedure according to the status signal.

Electronic device using trigger signal and status signal to execute a plurality of booting modes

A computer device and frequency adjusting method for central processing unit are provided. The computer device including a CPU, a voltage regulator module, a clock generator, a power-on module, a chip set and an embedded controller. The power-on module activates the voltage regulator module, the clock generator and the CPU respectively. The voltage regulator module provides the operating voltage of the CPU. The clock generator provides the operating clock of the CPU. Before the CPU is activated, the embedded controller adjusts the operating clock and the operating voltage provided from the clock generator and the voltage regulator module the CPU, the CPU performs overclocking/downclocking directly by using the adjusted operating clock and the adjusted operating voltage after the CPU is activated.

Computer device and frequency adjusting method for central processing unit

An electronic device includes a circuit board, a connector and an electronic module. The connector includes an insulating body and a first terminal set. The insulating body includes a concave. The first terminal set is fastened on the insulating body and is electrically connected to the circuit board. The electronic module is detachably disposed in the concave and includes a second terminal set. The second terminal set contacts the first terminal set to be electrically connected to the circuit board.

Electronic device

A signal switch connector set is disposed on a motherboard of a computer system. The signal switch connector set is capable of selectively connecting a USB 3.0 signal terminal of a south bridge chip to a USB 3.0 port located at the rear panel of a casing or connecting the USB 3.0 terminal of the south bridge chip to the USB 3.0 port located at the front panel of the casing.

Signal switch connector set applied to motherboard of computer system

A system management bus (SM Bus) system includes an arbitrator; a slave device connected to the arbitrator via an SM Bus; a first master device connected to the arbitrator capable of sending a first start command for communicating with the slave device; and a second master device connected to the arbitrator capable of sending a second start command for communicating with the slave device. The arbitrator set the first master device to have a priority, and when the first start command is being executed and the arbitrator receives the second start command, the arbitrator confirms whether the SM Bus is busy or not after a second predetermined time, and if the SM Bus is not busy, the arbitrator transmits the second start command to the slave devices via the SM Bus.

Arbitrator and arbitrating method applied to system management bus system

An overclocking control method cooperates with an overclocking application of a computer system when the overclocking application is started. The overclocking control method includes the steps as follows. A BIOS enters an overclocking mode according to an executing state of the overclocking application. The BIOS receives a first triggering signal outputted from a south bridge chip, and the first triggering signal is generated by the south bridge chip according to a first button of the computer system. The BIOS selects a piece of corresponding overclocking information from a look-up table and loads the overclocking information into a register of the BIOS according to the first triggering signal to control the overclocking of the computer system.

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Taipei, Taiwan

Li-Chien Wu