Analog Power Conversion LLC

Other

Kyosan Electric Manufacturing Co., Ltd.

Leslie Louis Szepesi

Amaury Gendron-Hansen

Dumitru Gheorge Sdrulla

Eric T Martin

Adam L Ghozeil

Itsuo Yuzurihara

Yu Hosoyamada

Tomohiro Yoneyama

Tetsuya Takata

A semiconductor device includes a substrate, and a plurality of active regions disposed over the substrate. The plurality of active regions have a first total area. One or more inactive regions are also disposed over the substrate. The one or more inactive regions have a second total area. The second total area is greater than or equal to 1.5 times the first total area. The active regions may be formed in an epitaxial layer formed over the substrate. A plurality of cells of an active device may be disposed in the plurality of active regions. The inactive regions may include only structures that do not dissipate substantial power when the semiconductor device is functioning as it is designed to function.

Power device with partitioned active regions

A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).

Schottky diode integrated with a semiconductor device

A tub of a semiconductor device includes a cool zone with a first projected operating temperature and a hot zone with a second projected operating temperature greater than the first projected operating temperature. A design parameter has a first value in the cool zone and a second value different from the first value in the hot zone. The difference configures the tub to dissipate less heat in the hot zone during operation of the semiconductor device than would be dissipated if the first and second values were equal. The design parameter may be, for example, a tub width, a source structure width, a JFET region width, a channel length, a channel width, a length of a gate, a displacement of a center of the gate relative to a center of a JFET region, a dopant concentration, or a combination thereof.

Semiconductor device with improved temperature uniformity

The present invention provides a voltage driven array having an array of discrete elements arranged in at least one row and plurality of columns. A resistive element has a first end and a second end provided with a first voltage and a second voltage respectively. The first voltage is different from the second voltage. Positions along the resistive element connect to each of the rows or columns such that each of the different positions along the resistive element supplies a different voltage to the respective row or column than a remainder of the positions.

Calibration of a voltage driven array

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Bend, OR, United States of America

Leslie Louis Szepesi