Applied Materials, Inc.

Omnivision Technologies, Inc.

Other

Micro Materials Inc.

Lequn Liu

Sanjay S Natarajan

Suganda Jutamulia

Duli Mao

Gang Chen

Dyson Hsinchih Tai

Tomohiko Kitajima

Yuanwei Zheng

Gill Yong Lee

Sung-Kwan Kang

Chang Seok Kang

Priyadarshi Panda

Jonathan C Shaw

Yin Qian

Suketu Arun Parikh

Ming Zhang

Regina Germanie Freed

Joung Joo Lee

Ho-yung David Hwang

Oray Orkun Cellek

Uday Mitra

Dominic Massetti

Alexander Jansen

Dyson Hsin-Chih Tai

Guannho Tsau

Libo Weng

Kenny Geng

Anson Chan

Methods for forming interconnects on a substrate with low resistivity and high dopant interfaces. In some embodiments, a method includes depositing a first copper layer with a dopant with a first dopant content of 0.5 percent to 10 percent in the interconnect by sputtering a first copper-based target at a first temperature of zero degrees Celsius to 200 degrees Celsius, annealing the substrate at a second temperature of 200 degrees Celsius to 400 degrees Celsius to reflow the first copper layer, depositing a second copper layer with the dopant with a second dopant content of zero percent to 0.5 percent by sputtering a second copper-based target at the first temperature of zero degrees Celsius to 200 degrees Celsius, and annealing the substrate at a third temperature of 200 degrees Celsius to 400 degrees Celsius to reflow the second copper layer.

Methods for copper doped hybrid metallization for line and via

Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers comprises a single crystalline-like silicon layer and includes a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described.

3D DRAM structure with high mobility channel

Methods of forming a DRAM bit line to improve line edge roughness (LER) and lower resistance are described. The method comprises implanting an inert species into a bit line metal layer having a first grain size on a substrate to form an amorphized bit line metal layer having a second grain size smaller than the first grain size. A film stack is then deposited on the amorphized bit line metal layer. The film stack and amorphized bit line metal layer are etched to form a patterned film stack on the substrate. The patterned film stack on the substrate is thermally annealed.

Method of processing dram

An eye wear comprises an optical filter disposed in front of an eye. The optical filter has a transmittance function of wavelength comprising a transmittance peak having a peak transmittance and a transmittance bandwidth. A transmittance outside the transmittance peak is at a lower level transmittance, wherein a ratio of the lower level transmittance to the peak transmittance is less than unity. The transmittance peak is at a central wavelength of a laser that emits laser light forming one of a laser spot and a laser line. The transmittance bandwidth is larger than a bandwidth of the laser light emitted by the laser. The laser spot or the laser line formed by the laser light emitted by the laser is viewed through the eye wear.

Eye wear visually enhancing laser spot and laser line

Method of processing DRAM

3D dram structure with high mobility channel

Methods of forming and processing semiconductor devices are described. Certain embodiments relate to the formation of self-aligned DRAM capacitors. More particularly, certain embodiments relate to the formation of self-aligned DRAM capacitors utilizing the formation of self-aligned growth pillars. The pillars lead to greater capacitor heights, increase critical dimension uniformity, and self-aligned bottom and top contacts.

DRAM capacitor module

A 3D imaging system comprises a phase detection autofocus (PDAF) image sensor, a lens for imaging a cross-section of a 3D object on the PDAF image sensor and an actuator for driving the lens for focusing each cross-section of the 3D object on the PDAF image sensor. The actuator drives the lens until the PDAF image sensor identifies an image of a first cross-section of the 3D object in-focus and records the image of the first cross-section. The PDAF image sensor records images of subsequent cross-sections of the 3D object formed by the lens driven by the actuator on the PDAF image sensor. The recorded images of each cross-section of the 3D object are stacked to form a 3D image of the 3D object.

3D imaging using phase detection autofocus (PDAF) image sensor

A resonant-filter image sensor includes a pixel array including a plurality of pixels and a microresonator layer above the pixel array. The microresonator layer includes a plurality of microresonators formed of a first material with an extinction coefficient less than 0.02 at a free-space wavelength of five hundred nanometers. Each of the plurality of pixels may have at least one of the plurality of microresonators at least partially thereabove. The resonant-filter image sensor may further include a layer covering the microresonator layer that has a second refractive index less than a first refractive index, the first refractive index being the refractive index of the first material. Each microresonator may be one of a parallelepiped, a cylinder, a spheroid, and a sphere.

Resonant-filter image sensor and associated fabrication method

A display system comprises a first display for providing a first value and a second display for providing a second value. The displayed image is a product of multiplication of the first value provided by the first display and the second value provided by the second display. The first display is a transmissive display comprises: a first glass substrate, an unpatterned ITO layer, a LC layer, a patterned ITO layer having isolated electrodes, and a second glass substrate. The second display is a reflective LCOS comprises: a glass substrate, an unpatterned ITO layer, a LC layer, a metal electrode layer, and a silicon substrate.

Methods and systems for displaying high dynamic range images

An alignment layer for a liquid crystal on silicon (LCOS) display includes a nano-particle layer. In a particular embodiment the nano-particle layer includes a lower nano-layer and an upper nano-layer, each formed onto oxide layers of the LCOS display. In a more particular embodiment, the lower nano-layer and the upper nano-layer are offset printed onto the oxide layers.

Method to make LCOS oxide alignment layer by offset print

Growing community of inventors

San Jose, CA, United States of America

Lequn Liu