General Electric Company

Lockheed Martin Corporation

Leonard Richard Douglas

Ernest Wayne Balch

Robert J Wojnarowski

James Wilson Rose

Richard J Saia

Kevin Matthew Durocher

Thomas Bert Gorczyca

Michael Gdula

Evan Taylor Downey

Raymond Albert Fillion

William Edward Burdick, Jr

Min-Yi Shih

Ronald Frank Kolc

Richard Joseph Saia

A method for adaptively fabricating a waveguide comprises: measuring misplacement of a photonic device relative to a substrate; generating computer readable instructions for using a plurality of graphics primitives to form the waveguide; and photocomposing the waveguide on the substrate in accordance with the computer readable instructions. A reticle comprises a plurality of graphics primitives with at least one of the plurality of graphics primitives comprising a tapered end. A waveguide comprises a plurality of waveguide segments with each of the plurality of waveguide segments comprising a tapered end and being adjacent to at least one other of the plurality of waveguide segments.

Waveguide including a plurality of waveguide segments

Method and apparatus for fabricating waveguides and waveguides fabricated therefrom

A method and process sequence for accurately aligning (die to interconnect metal on flex substrate such as polyimide flex is described. A mask for via formation is first patterned in a metal layer on the bottom surface of the flex substrate. Die attach means such as die attach adhesive is then applied to the top side of flex substrate. The bond pads on die are locally, adaptively aligned to the patterned metal via mask on the flex with high accuracy. Vias down to the die bond pads are then created by either plasma etching or excimer laser ablation through the existing aligned metal mask on the flex substrate, and interconnect metal is then deposited, patterned and etched. As a result of this process, the flex metal interconnect artwork does not have to be customized for each die misplacement using &ldquo;adaptive lithography&rdquo;. Lower cost commercially available lithography equipment can be used for processing, reducing capital equipment and processing cost. The method is compatible with the projected designs of the next generation die which will have bond pads on the order of 40um in size.

Apparatus for aligning die to interconnect metal on flex substrate

A method for interconnecting high-temperature silicon carbide (SiC) devices enables such high-temperature devices to be used in fabricating electronic circuits of significant scale. This method comprises empirically measuring operational characteristics of a plurality of the devices to be interconnected, the operational characteristics comprising devices which are measured to be non-working and devices which are measured to be working; characterizing the operational characteristics in an operational characteristics map; designing interconnection paths between and among the devices that are characterized to be working by the operational characteristics map; and excluding from the interconnection paths, devices that are characterized to be non-working by the operational characteristics map. A preferred embodiment of this method further includes disposing a temporary polymer layer over the devices; forming via holes through the temporary polymer layer, to bonding pads of the devices; applying a current-balancing resistive metal over the temporary polymer layer; establishing connections between the current-balancing resistive metal and the bonding pads; designing the interconnection paths between and among the working devices by patterning the current-balancing resistive metal based on the operational characteristics map; and removing the temporary polymer layer.

High temperature circuit apparatus

A system and method for handling quality control data for a manufacturing process among a main computer and a plurality of remote computers, including the steps of establishing a connection between at least one of the remote computers and the main computer via a web browser, inputting quality control data of the manufacturing process from the remote computer into a database of the main computer via the web browser, performing a statistical analysis on the quality control data input into the main computer, and posting results of the statistical analysis on a web site of the main computer accessible to the remote computers through the web browser.

System and method of collecting statistically analyzing and graphically displaying quality control data for a manufacturing process

A method and process sequence for accurately aligning (die to interconnect metal on flex substrate such as polyimide flex is described. A mask for via formation is first patterned in a metal layer on the bottom surface of the flex substrate. Die attach means such as die attach adhesive is then applied to the top side of flex substrate. The bond pads on die are locally, adaptively aligned to the patterned metal via mask on the flex with high accuracy. Vias down to the die bond pads are then created by either plasma etching or excimer laser ablation through the existing aligned metal mask on the flex substrate, and interconnect metal is then deposited, patterned and etched. As a result of this process, the flex metal interconnect artwork does not have to be customized for each die misplacement using &ldquo;adaptive lithography&rdquo;. Lower cost commercially available lithography equipment can be used for processing, reducing capital equipment and processing cost. The method is compatible with the projected designs of the next generation die which will have bond pads on the order of 40 um in size.

Method for aligning die to interconnect metal on flex substrate

Silicon carbide large area device fabrication apparatus and method

One method for packaging at least one circuit chip includes: providing an interconnect layer including insulative material having a first side and a second side, initial metallization patterned on second side metallized portions of the second side and not on second side non-metallized portions of the second side, at least one substrate via extending from the first side to one of the second side metallized portions, and at least one chip via extending from the first side to one of the second side non-metallized portions; positioning the at least one circuit chip on the second side with at least one chip pad of the at least one circuit chip being aligned with the at least one chip via; and patterning connection metallization on selected portions of the first side of the interconnect layer and in the vias so as to extend to the at least one second side metallized portion and to the at least one chip pad. In related embodiments vias are pre-metallized and coupled to chip pads of the circuit chips by an electrically conductive binder. Thin film passive components and multilayer interconnections can additionally be incorporated into the package.

Circuit chip package and fabrication method

A method according to an aspect of the invention, for interconnecting electrical contacts or electrodes (,) of semiconductor chips (,) in an HDI context, includes the step of applying laser energy to make a pattern of apertures through a dielectric film which corresponds to the ideal locations of electrodes of semiconductor chips properly placed on the film. This may be accomplished, in one mode of the method, by procuring an optical mask (,) defining an ideal pattern of electrodes of semiconductor chips properly aligned in an HDI structure. This mask may be sufficiently large to cover a plurality of HDI circuits being made on a substrate, or it may cover only one such HDI circuit. Laser energy (,) is applied to a dielectric film (,) through apertures or transparent regions (,) of the mask, to thereby make the ideal pattern of holes in the film. Semiconductor chips (,) are mounted to a first side (,) of the dielectric film, as by means of adhesive, with the electrodes (,) in registry with the corresponding ones of the holes (,). This has the effect of mounting the semiconductor chips (,) in their ideal locations. Electrically conductive material (,), such as metallization, is applied to a second side (,) of the film (,) and to at least the sides of the holes (,), so as to interconnect the electrodes (,) with an interconnect pattern (,) of the electrically conductive material (,).

HDI chip attachment method for reduced processing

A method is provided for the manufacture of precision electronic components such as resistors, inductors, and capacitors on a polymer or ceramic surface. The electronic components can be deposited and trimmed to precise or matched values without having precise depositions of all of the pre-patterned materials. Thin film electronic components are deposited on a surface, parameter values are measured or estimated, a correction offset file is generated, and the components are trimmed using adaptive lithography to a very close tolerance. A computer program can be used to enable the adjustment of electronic components by techniques such as changing the physical length of an inductor coil or resistor lead, or by changing a capacitor plate area.

Method for fabricating a thin film inductor

Method for fabricating a thin film capacitor

An adaptive method of providing electrical interconnections for a plurality of feed-through lines each having a respective end extending to at least one substrate surface includes generating an artwork representation for the electrical interconnections using specified feed-through line end positions on the at least one substrate surface. The at least one substrate surface may include a surface of a stack of substrates with at least two substrates having feed-through line ends facing a common direction. Actual positions of the at least two of the feed-through line ends are determined, and a scale factor is estimated using the determined actual positions. Actual positions of others of the feed-through line ends are estimated using the scale factor, and the artwork representation is modified to properly include electrical interconnections to ones of the feed-through line ends which are not in their specified positions. The artwork representation can be converted into a turn point polygon (TPP) format for effective data handling and modification of the artwork representation, and the TPP format can then be can be converted to a rectangular representation. A laser can be controlled in accordance with the rectangular representation of the modified artwork.

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Burnt Hills, NY, United States of America

Leonard Richard Douglas