Epcos Ag

Nxp B.v.

Snaptrack Incorporated

Léon C M Van Den Oever

Erwin Spits

Jeroen Bouwman

Bart Balm

Antonius J M De Graauw

Carem Destouches

Ray J E Hueting

Ooijman Remco

A new front-end module is disclosed. In an embodiment the front-end module is configured to operate carrier aggregation modes using a cascade of switches and an intelligent set of bands. The module can be assembled by sub-modules.

Front-end module for carrier aggregation mode

A bipolar transistor includes a substrate of semiconductor material, a high-mobility layer in the substrate, and a donor layer adjacent to the high-mobility layer. An emitter terminal forms an emitter contact on the donor layer, and a collector terminal forms a collector contact on the donor layer. A base terminal is electrically conductively connected with the high-mobility layer. The transistor can be produced in a HEMT technology or BiFET technology in GaAs.

Bipolar transistor with lateral emitter and collector and method of production

A voltage regulator can provide a regulated output voltage. The voltage regulator includes a regulating module that includes a resistor and a field effect transistor that has a threshold voltage. The resistor is coupled to a gate terminal and a source terminal of the field effect transistor. The regulating module provides the output voltage. A reference module is suitable for detecting a variation of the output voltage. The reference module is coupled with the regulating module. A current sink is suitable for subtracting a compensation current from the current flowing from the regulating module to the reference module. The compensation current is dependent on a variation of the threshold voltage.

Voltage regulator and a method for reducing an influence of a threshold voltage variation

A power amplifier circuit (DIPPA), comprising a driver stage (DR) which is applicable to provide a preamplified driver signal (S_DR) dependent on a predetermined transmit signal. The power amplifier circuit (DIPPA) comprises also a frequency selector (DIP) which is electrically coupled to the driver stage (DR) and which is applicable to separate the driver signal (S_DR) into a first and second signal (S, S). The first signal (S) is associated to a first predetermined and the second signal (S) is associated to a second predetermined frequency band. The power amplifier circuit (DIPPA) comprises at least a first and second power amplifier stage (PA, PA). The first and second power amplifier stage (PA, PA) are electrically coupled to the frequency selector (DIP). The first and second power amplifier stage (PA, PA) is operable to provide a first and second amplified signal (S_A, S), respectively, dependent on the first and second signal (S, S), respectively.

Power amplifier circuit and front end circuit

Circuit unit (CU) comprising a heterojunction bipolar transistor and a long-gate pseudomorphic high-electron-mobility transistor. Either a source (S) or a drain (D) of the long-gate pseudomorphic high-electron-mobility transistor is electrically coupled with either a collector (C) or an emitter (E) of the heterojunction bipolar transistor.

Circuit unit, bias circuit with circuit unit and differential amplifier circuit with first and second circuit unit

A circuit includes a logic stage, an inverter stage, and a driver stage. The logic stage and the inverter stage are provided with current limiters, which include a D-mode feedback transistor and a component that generates a voltage drop. A feedback loop connects the source and the gate of the D-mode feedback transistor via this component. The driver stage includes E-mode transistors connected in a totem pole that drive a D-mode transistor and an E-mode transistor to connect and disconnect the load circuit.

Low-current logic plus driver circuit

A circuit includes E-mode transistors with gate-source junction, a D-mode transistor with gate-source junction. A component generates a voltage drop between the source of the D-mode transistor and the drain of an E mode transistor provided as a signal output. A connection is made between this drain of the E-mode transistor and the gate of the D-mode transistor, and a signal input at the gates of the E-mode transistors.

Low-current logic-gate circuit

An n-layer is arranged above a substrate, which can be GaAs, and a p-layer () is arranged on the n-layer. The p-layer is separated by a gate electrode into two separate portions forming source and drain. The gate electrode is insulated from the semiconductor material by a gate dielectric. Source/drain contacts are electrically conductively connected with the portions of the p-layer.

P-type field-effect transistor and method of production

A current-limited differential entry stage compares an input signal to a reference voltage generated by a current-limited transistor or diode configuration. Current limiters comprise a D-mode feedback transistor having a gate-source junction. The D-mode transistor is not conducting between the source and the drain if a gate-source voltage is more negative than a negative threshold voltage, and conducting between the source and the drain, otherwise a feedback connection connects the source of the D-mode feedback transistor to its gate via a component that generates a voltage drop.

Low-current input buffer

A base contact connection, an emitter structure and a collector structure are arranged on an n-layer, which can be provided for additional npn transistors. The collector structure is arranged laterally to the emitter structure and at least one of the emitter and collector comprises a Schottky contact on a surface area of the n-layer.

Bipolar transistor with emitter and/or collector contact structure forming a Schottky contact and method of production

Bandgap reference circuit, comprising a voltage generator (VG) designed to produce a voltage or a current proportional to absolute temperature, a supply circuit (SC), designed to produce a supply for operating the voltage generator (VG), comprising a bias element (BS) and a control element (CS), and a bias circuit (BC), designed to produce a bias for operating the voltage generator (VG), comprising a bias element (BB) and a control element (CB). At least one of the control element (CS) of the supply circuit (SC) and the control element (CB) of the bias circuit (BC) comprises a pseudomorphic high-electron-mobility transistor or a hetero-junction bipolar transistor and/or at least one of the bias element (BS) of the supply circuit (SC) and the bias element (BB) of the bias circuit (BC) comprises a long-gate pseudomorphic high-electron-mobility transistor or a resistor. Method for producing the circuit wherein the pseudomorphic high-electron-mobility transistors and the hetero-junction bipolar transistors are produced using a GaAs BiFET technology process.

Bandgap reference circuit and method for producing the circuit

The present invention relates to an electronic device for power efficient linear amplification. The electronic device includes an amplifier (RF-PA) for amplifying a phase modulated signal (PM). The amplifier (RF-PA) is adapted to be controlled by a first modulating signal (AM high) for modulating the amplitude of the phase modulated signal (PM) above a predetermined amplitude value. The electronic device is further adapted to attenuate an output signal of the amplifier (RF-PA) for providing amplitude modulation below the predetermined amplitude value.

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Rosmalen, Netherlands

Léon C M Van Den Oever