Nxp B.v.

Leo Sevat

Anteneh Alemu Abbo

Richard P Kleihorst

A single instruction multiple data (SIMD) processor () comprises a processing element array () including a plurality of processing elements (PEO . . . PEN), and a memory array () operably divided into memory portions (), each memory portion being assigned to a particular processing element. A first processing element (PE) is operable to access a portion of the memory array () assigned to that first processing element and also to access a portion of the memory array assigned to a second processing element. Such access is made using an index value indicative of the processing element assigned to the memory position to be accessed.

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Veldhoven, Netherlands

Leo Sevat