Hewlett-packard Company

Hewlett-packard Development Company, L.p.

Leo J Embry

Michael S Allison

John A Morrison

Thomas Charles Oliver

Stephen J Silva

Michael John Erickson

Robert J Blakely

Kraig A Proehl

John R Feehrer

Daniel G Franke

David J Ellis

A computer program version checking system checks at least one version of software running on a computing device including a plurality of programmable devices. A version of software running on the computing device is identified and compared to a version of the software in a recipe that is previously determined to be a correct version of the software. A determination is made as to whether the versions match.

Verification of computer program versions based on a selected recipe from a recipe table

The time required to boot a computer is reduced by reducing or eliminating the need to discover many or all devices within the computer and the machine topology. Access panels are monitored so that it is detected when they are opened. For the access panels that have not been opened, it is assumed that the system configuration, topology, devices, etc. have not changed since the last boot process and there is no need to spend time discovering these devices and machine topology. Stored, instead of discovered, configuration information is then used to configure these devices. This reduces the time required to boot since discovery of devices is not performed. A service processor or other logic may be used to detect which access panels are opened. Also, only those elements of the configuration that may be affected by the particular access panels that were opened need to be re-discovered.

Reducing boot times via intrusion monitoring

An apparatus and method for distributing interrupts to Intel&reg; Architecture (IA)-32 processors includes a system bus having a number of nodes. Each node includes a bridge that couples the system bus to a processor bus. The processor bus may include multiple IA-32 processors. The system bus may include any number of nodes. Interrupt transactions appearing on the system bus are converted by the bridge to interrupt signals. The bridge asserts the interrupt signals at one of two pins on a target IA-32 processor. One pin may be programmed to receive non-maskable interrupts and the other pin may be programmed to receive external interrupts. The bridge incorporates a priority and threshold mechanism. The bridge includes a buffer to store pending interrupt signals. The apparatus and method may be used in a mixed IA-32 and IA-64 computer architecture that uses IA-64 components to receive interrupts and uses the bridge to convert the transactions on an IA-64 bus into interrupt signal assertions to an IA-32 processor.

Apparatus and method for converting interrupt transactions to interrupt signals to distribute interrupts to IA-32 processors

An apparatus and method for fault resilient booting of a multi-processor system. The apparatus attempts a cold reset of the system, during which each processor performs a built-in self test. The apparatus selects a boot strap processor to perform a warm reset, during which any failed processors are tristated using a flush command. If no boot strap processor is available, the apparatus performs the warm reset and tristates any failed processor including the processor predesignated to be the boot strap processor, and then repeats the attempt to establish the boot strap processor.

Apparatus and method for implementing fault resilient booting in a multi-processor system by using a flush command to control resetting of the processors and isolating failed processors

An apparatus and a method are provided to distribute interrupts from a system bus to Intel&reg; Architecture (IA)-32 applications processors. The apparatus includes a bridge that couples a processor bus to the system bus. In addition, the bridge is coupled to an advanced programmable interrupt controller (APIC) by an APIC bus. The bridge monitors the system bus for interrupts and converts selected interrupt transactions into APIC messages. The bridge then sends the APIC messages to the APIC bus. Each of the applications processors is also coupled to one of many APIC buses. The applications processor that is the target of the interrupt transaction receives the APIC message and executes an interrupt handler routine. The apparatus and method also incorporate interrupt transaction buffering and throttling.

Apparatus and method for delivering interrupts via an APIC bus to IA-32 processors

Methods and apparatus for coupling a host system to an image scanner in which high-level functions are migrated out of the scanner control module up to the attached host system. The host system and the scanner, via its control module, communicate using a low-level control instruction set. The low-level control instruction set enables the host system to directly control the scanning process by reading and writing memory locations within the control module. The memory locations include data structures descriptive of control operations to be performed by the scanner control module as well as status to be reported from the scanner to the host system. The low-level control instruction set includes instructions generated by the host system requesting return of particular data from memory locations in the scanner control module as well as instructions requesting the writing of particular data to memory locations in the scanner control module. Host based elements translate high-level scanner commands received, for example, from application programs into corresponding sequences of low-level control instructions. In particular, the present invention may be advantageously applied to translate Hewlett-Packard Scanner Control Language (SCL) requests into low-level control instruction sequences (also referred to as Scanner Primitive Language or SPL). Shifting computation and memory requirements from the scanner control module to the host system substantially simplifies scanner control module design enabling production of lower cost scanning devices.

System for coupling a host computer to an image scanner in which high

A system and method for simultaneously spinning up an optical disk and performing operations to prepare the optical disk for data access in an optical disk drive system. A controller controls the performance of various disk drive operations in parallel with the acceleration and settling of the optical disk. The spin-up sub-process includes three operational periods for high density media and five operational periods for low density media. Each of these periods corresponds to a different range of spindle speed and stability. First, the optical disk accelerates towards a target speed. During the first operational period wherein the spindle oscillation is greater than a minimum threshold speed variance, operations which are not speed dependent are performed. During the second operational period wherein the spindle is settling and the oscillation is between the minimum and a final threshold speed variance, speed dependent operations are performed. These include reading header information, and performing initial calibrations. When the spindle further settles and the oscillations are less than the final threshold speed variance, speed dependent calibrations which must be performed when the disk media is rotating at the target operational speed are performed.

Overlapped spin-up process for optical disk drive

Detecting blank sectors in an optical disk is disclosed. Such detection operates by sampling a target data field of a sector on the optical disk and generating a read peak signal based upon the sampling. The read peak signal is then compared to a predetermined amplitude threshold. A counter is incremented if the read peak signal is less than the predetermined amplitude threshold. After the above steps are performed a predetermined number of times, the counter is compared to a predetermined sample threshold value. Then, the sector is interpreted as being blank if the counter is greater than the predetermined sample threshold value. If, instead, the counter is less than the predetermined sample threshold value, then the sector is interpreted as being non-blank.

Growing community of inventors

Ft. Collins, CO, United States of America

Leo J Embry