Intel Corporation

Leif R Paulson

Bernhard Sell

Kinyip Phoa

Chieh-Jen Ku

Ayan Kar

Pushkar Ranade

Justin S Sandford

Akm A Ahsan

Keith Zawadzki

Shi Liu

Junjun Wan

An integrated circuit structure comprises at least one metal gate formed in a first dielectric layer, the at least one metal gate comprising a workfunction layer and the gate oxide layer along sidewalls of the first dielectric layer. A field effect (FE) dielectric layer dielectric layer is above the first dielectric layer of the at least one metal gate. A precision resistor comprising a thin-film metallic material is formed on the FE dielectric layer above the at least one metal gate and extending laterally over the at least one metal gate.

Embedded precision resistor for non-planar semiconductor device architectures

This disclosure illustrates a FinFET based dual electronic component that may be used as a capacitor or a resistor and methods to manufacture said component. A FinFET based dual electronic component comprises a fin, source and drain regions, a gate dielectric, and a gate. The fin is heavily doped such that semiconductor material of the fin becomes degenerate.

FinFET based capacitors and resistors and related apparatuses, systems, and methods

The present invention discloses a method including: providing a substrate; forming recessed regions adjacent to both sides of a gate on the substrate; performing an angled co-implant of a species in two steps with two different energies and two different doses into the recessed regions; forming Silicon-Germanium in the recessed regions; forming source/drain extensions adjacent to both sides of the gate with a dopant; and performing an anneal to activate the dopant.

Ultra-abrupt semiconductor junction profile

Growing community of inventors

Portland, OR, United States of America

Leif R Paulson